摘要:
A switching fabric connects input ports to output ports. Each input has an input pointer referencing an output port, and each output has an output pointer referencing an input port. An arbiter includes input and output credit allocators, and an arbitration module (matcher). The input credit allocator resets input credits associated with input/output pairs and updates the input pointers. Similarly, the output credit allocator resets output credits associated with input/output pairs and updates the output pointers. The matcher matches inputs to outputs based on pending requests and available input and output credits. A scheduler schedules transmissions through the cross-bar switch according to the arbiter's matches.
摘要:
Data cells of plural classes are transferred from input ports to output ports through a switch by storing the cells at each input port in class-specific virtual output queues (VOQ) within sets of VOQs associated with output ports, and providing credits to VOQs according to class-associated guaranteed bandwidths. When a cell is received at a VOQ having credits, a high-priority request for transfer is generated. If a cell is received at a VOQ that does not have any available credits, a low-priority request for transfer is generated. In response to requests, grants are issued to VOQ sets without regard to class, high-priority requests being favored over low-priority requests. When a grant is received for a particular VOQ set, an arbitrator selects a VOQ from the set, giving priority to VOQs having credits over VOQs without credits, and a cell from the selected VOQ is transferred. Requests generated from all input ports are forwarded to a central scheduler associated with a switch fabric slice, the central scheduler issuing the grants. The switch fabric may comprise multiple slices and a central scheduler, across which requests may be distributed in parallel, for example, the switch fabric slices being selected in a fixed order. While all high-priority requests are granted, low priority requests may be granted by the central scheduler according to a weighted fair share policy.
摘要:
Where links between a port module and plural switch fabric slices are of various lengths, a cell is transmitted from the port module to a switch fabric slice in response to a grant. The transmission is delayed by an amount based on a link round trip delay (RTD) value for the corresponding link between the port module and the switch fabric slice, and a predetermined global delay value. As a result of this delay, the cell arrives at the switch fabric slice at a fixed number of cell times (equal to the global delay value) after issuance of the grant, independent of any link lengths.
摘要:
An asynchronous transfer mode (ATM) traffic control framework is based on an integrated usage parameter control (UPC) approach, which approach provides a unified and scalable solution to the issue of quality-of-services (QOS) levels over a range of anticipated services in ATM based networks. The approach is consistent with emerging ATM Forum and CCITT standards. Additionally, a UPC-based call and burst admission control providing the desired QOS over periods of network overload by call/burst admission control and traffic shaping of source stream preferably uses a dual leaky bucket.
摘要:
A rate based feedback congestion control at an ATM switch for ABR vservice is based upon the state of the switch queue fill. Individual ABR virtual channels are informed of an explicit rate at which the virtual channels are allowed to transmit cells.
摘要:
A Dynamic Rate Control (DRC) scheduler for scheduling cells for service in a generic Asynchronous Transfer Mode (ATM) switch is disclosed. According to the inventive DRC, each traffic stream associated with an internal switch queue is rate-shaped according to a rate which consists of a minimum guaranteed rate and a dynamic component computed based on congestion information within the switch. While achieving high utilization, DRC guarantees a minimum throughput for each stream and fairly distributes unused bandwidth. The distribution of unused bandwidth in DRC can be assigned flexibly, i.e., the unused bandwidth need not be shared in proportion to the minimum throughput guarantees, as in weighted fair share schedulers. Moreover, an effective closed-loop QoS control can be built into DRC by dynamically updating a set of weights based on observed QoS. Another salient feature of DRC is its ability to control congestion internal congestion at bottleneck points within a multistage switch. DRC can also be extended beyond the local switch in a hop-by-hop fashion.
摘要:
A system for variable bit-rate video coding in which encoding bandwidth as characterized by a usage parameter control (UPC) parameters is renegotiated between a video encoder and an asynchronous transfer mode network in order to maintain quality-of-service and save bandwidth. The coding system includes adjusting the video source quantization in a manner for controlling the occupancy level of a buffer while new UPC parameters are requested from an ATM network.
摘要:
A control method and architecture is described for an ATM network carrying connectionless data traffic. The method is capable of integrating connection-oriented as well as connectionless traffic. The method takes advantage of the quasi-deterministic nature of the traffic emanating from a source that is being shaped by the leaky bucket shaping algorithm. Alternative methods are provided if such a shaping algorithm is not provided by the CPE which methods still guarantee performance that equals or exceeds shared media networks such as FDDI. Hardware and software embodiments of the methods are disclosed. The invention is particularly applicable to LANs and hubs.
摘要:
A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing of memory, maximizes the overall memory utilization. An ATM switch using a dynamic queue threshold scheme, said ATM switch comprising K output port queues and a buffer of B cells sharing said K output port queues, wherein a common threshold is dynamically set for the K output port queues, the common threshold being changed to a new value from an old value when a new cell arrives at any of said K output queues, said new value being a maximum of a length of said any of said K output queues plus one and said old value when total queue length is less than a preset value times B and, said new value being a maximum of a said old value minus one and a statically set minimum buffer threshold when total queue length is greater than or equal to a preset value times B, wherein said preset value is greater than or equal to 0.
摘要:
The present invention pertains to message sets for use in a flexible programmable multiplexer for accessing an Asynchronous Transfer Mode (ATM) network. The access multiplexer uses a functional separation of line related functions and protocol related functions. Line interface cards perform line related functions. A message set for use in such a multiplexing system that uses a functional separation of line and protocol related functions is provided. The message set includes a general message, a hello message, a configuration message, a line stabilized message, an identify remote message, an identify remote acknowledgement message, a reset remote message, a report statistics message, a report statistics acknowledgement message, a loopback test message and a dynamic rate adaptation message. A flexible programmable multiplexer that uses the message set is also provided.