摘要:
A device for driving a switch in a digital-to-analog converter (DAC) includes first and second latches, and a logic gate. The first latch is configured to store a digital input data signal according to a clock signal, and to output a first latch signal corresponding to the stored digital input data signal. The second latch is configured to store the first latch signal output by the first latch according to a logical inverse of the clock signal, and to output a second latch signal corresponding to the stored first latch signal. The logic gate is configured to perform an OR logic operation on the first latch signal and the second latch signal, the logic gate outputting a drive signal for driving a switch in the DAC connected to a current source.
摘要:
A pair of motorcycle tires includes front and rear tires. The front tire's tread band includes at least one circumferential groove and a plurality of transverse grooves. The at least one circumferential groove extends at an equatorial plane of the front tire within a central zone of the tread band. The transverse grooves include axially inner ends lying within the central zone that alternately extend from the central zone toward axially opposite shoulder zones. At least some of the transverse grooves are connected to the at least one circumferential groove. The rear tire's tread band includes an area defining a substantially null sea/land ratio within a central zone of the tread band. The central zone of the rear tire's tread band has a width greater than or equal to about 5% and less than or equal to about 30% of an axial development of the rear tire's tread band.
摘要:
A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by analog circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e., its position in the X and Y dimensions. The profile of position may also be integrated to provide Z-axis (pressure) information.
摘要:
A reference voltage source which provides a plurality of reference voltages with equal step size between voltages despite loads connected to the reference voltage source. The reference voltage source is composed of a plurality of slave resistors connected in series to produce a plurality of output nodes and a plurality of master resistors connected in series to produce a plurality of compensation nodes. Each compensation node corresponds with one of the output nodes. A compensation resistor connects between a compensation node and the corresponding output node. A current flows through the slave resistors to generate a reference voltage at each output node. Another current flows through the master resistors and generates at each compensation node a compensation voltage that differs from the reference voltage at the corresponding output node by a magnitude sufficient to cause a compensation current to flow through the associated compensation resistor into the corresponding output node and offset a load current drawn from the output node by a load connected to the output node.
摘要:
A phase-locked loop circuit comprises an analog section, a digital section and a digital offset mitigation circuit. The analog section is subject to offset error and comprises an analog phase comparator and an analog-to-digital converter. The digital section comprises a digital loop filter and a digitally-controlled frequency-generating circuit. The digital loop filter is connected to receive a digital difference signal from the analog-to-digital converter. The digital offset mitigation circuit is operable in response to the digital difference signal to mitigate the offset error of the analog section.
摘要:
A linear PLL includes a VCO with first and second tuning elements. The first tuning element is adjusted in proportion to the phase error between an input signal and a VCO signal and the second tuning element is adjusted by an integral function of the phase error. By configuring the VCO with separate tuning elements that are separately adjusted in proportion to the phase error and by an integral function of the phase error, the 3 dB bandwidth frequency of the linear PLL depends primarily on the phase detector gain and the VCO gain that is contributed from the proportional adjustment. A linear PLL with separate proportional and integral tuning elements can be designed to exhibit a relatively constant gain over a relatively large frequency range.
摘要:
An offset related to a feedback system for a VCO is quantified and then a parameter of the feedback system is adjusted in response to the quantified offset to correct for the offset. Correcting for offset in a feedback system can improve the performance of a PLL by reducing phase drift between the input signal and the VCO signal. The reduced phase drift can have benefits such as, for example, reduced bit errors and/or improved phase tracking accuracy.