公开(公告)号：US08455359B2

公开(公告)日：2013-06-04

申请号：US13289107

申请日：2011-11-04

申请人： Kook-Joo Kim ,  Jin-Ho Kim ,  Seung-Ki Chae ,  Pil-Kwon Jun ,  Sun-Hee Park ,  Gyoung-Eun Byun

发明人： Kook-Joo Kim ,  Jin-Ho Kim ,  Seung-Ki Chae ,  Pil-Kwon Jun ,  Sun-Hee Park ,  Gyoung-Eun Byun

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L23/522 ,  H01L21/76829 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of forming a conductive pattern structure of a semiconductor device, a first insulating interlayer is formed on a substrate. A first wiring is formed to pass through the first insulating interlayer. An etch stop layer and a second insulating interlayer are sequentially formed on the first insulating interlayer. A second wiring is formed to pass through the second insulating interlayer and the etch stop layer. A dummy pattern is formed to pass through the second insulating layer and the etch stop layer at the same time as forming the second wiring. The second wiring is electrically connected to the first wiring. The dummy pattern is electrically isolated from the second wiring.

摘要翻译： 在形成半导体器件的导电图案结构的方法中，在基板上形成第一绝缘中间层。 形成第一布线以通过第一绝缘中间层。 在第一绝缘中间层上依次形成蚀刻停止层和第二绝缘中间层。 形成第二布线以通过第二绝缘中间层和蚀刻停止层。 在形成第二布线的同时，形成虚设图形以通过第二绝缘层和蚀刻停止层。 第二布线电连接到第一布线。 虚设图案与第二布线电隔离。

公开(公告)号：US20120196439A1

公开(公告)日：2012-08-02

申请号：US13289107

申请日：2011-11-04

申请人： Kook-Joo KIM ,  Jin-Ho Kim ,  Seung-Ki Chae ,  Pil-Kwon Jun ,  Sun-Hee Park ,  Gyoung-Eun Byun

发明人： Kook-Joo KIM ,  Jin-Ho Kim ,  Seung-Ki Chae ,  Pil-Kwon Jun ,  Sun-Hee Park ,  Gyoung-Eun Byun

IPC分类号： H01L21/28

CPC分类号： H01L23/522 ,  H01L21/76829 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of forming a conductive pattern structure of a semiconductor device, a first insulating interlayer is formed on a substrate. A first wiring is formed to pass through the first insulating interlayer. An etch stop layer and a second insulating interlayer are sequentially formed on the first insulating interlayer. A second wiring is formed to pass through the second insulating interlayer and the etch stop layer. A dummy pattern is formed to pass through the second insulating layer and the etch stop layer at the same time as forming the second wiring. The second wiring is electrically connected to the first wiring. The dummy pattern is electrically isolated from the second wiring.

摘要翻译： 在形成半导体器件的导电图案结构的方法中，在基板上形成第一绝缘中间层。 形成第一布线以通过第一绝缘中间层。 在第一绝缘中间层上依次形成蚀刻停止层和第二绝缘中间层。 形成第二布线以通过第二绝缘中间层和蚀刻停止层。 在形成第二布线的同时，形成虚设图形以通过第二绝缘层和蚀刻停止层。 第二布线电连接到第一布线。 虚设图案与第二布线电隔离。