SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20120196439A1

    公开(公告)日:2012-08-02

    申请号:US13289107

    申请日:2011-11-04

    IPC分类号: H01L21/28

    摘要: In a method of forming a conductive pattern structure of a semiconductor device, a first insulating interlayer is formed on a substrate. A first wiring is formed to pass through the first insulating interlayer. An etch stop layer and a second insulating interlayer are sequentially formed on the first insulating interlayer. A second wiring is formed to pass through the second insulating interlayer and the etch stop layer. A dummy pattern is formed to pass through the second insulating layer and the etch stop layer at the same time as forming the second wiring. The second wiring is electrically connected to the first wiring. The dummy pattern is electrically isolated from the second wiring.

    摘要翻译: 在形成半导体器件的导电图案结构的方法中,在基板上形成第一绝缘中间层。 形成第一布线以通过第一绝缘中间层。 在第一绝缘中间层上依次形成蚀刻停止层和第二绝缘中间层。 形成第二布线以通过第二绝缘中间层和蚀刻停止层。 在形成第二布线的同时,形成虚设图形以通过第二绝缘层和蚀刻停止层。 第二布线电连接到第一布线。 虚设图案与第二布线电隔离。

    Semiconductor devices and methods of manufacturing the same
    3.
    发明授权
    Semiconductor devices and methods of manufacturing the same 有权
    半导体器件及其制造方法

    公开(公告)号:US08455359B2

    公开(公告)日:2013-06-04

    申请号:US13289107

    申请日:2011-11-04

    IPC分类号: H01L21/44 H01L21/4763

    摘要: In a method of forming a conductive pattern structure of a semiconductor device, a first insulating interlayer is formed on a substrate. A first wiring is formed to pass through the first insulating interlayer. An etch stop layer and a second insulating interlayer are sequentially formed on the first insulating interlayer. A second wiring is formed to pass through the second insulating interlayer and the etch stop layer. A dummy pattern is formed to pass through the second insulating layer and the etch stop layer at the same time as forming the second wiring. The second wiring is electrically connected to the first wiring. The dummy pattern is electrically isolated from the second wiring.

    摘要翻译: 在形成半导体器件的导电图案结构的方法中,在基板上形成第一绝缘中间层。 形成第一布线以通过第一绝缘中间层。 在第一绝缘中间层上依次形成蚀刻停止层和第二绝缘中间层。 形成第二布线以通过第二绝缘中间层和蚀刻停止层。 在形成第二布线的同时,形成虚设图形以通过第二绝缘层和蚀刻停止层。 第二布线电连接到第一布线。 虚设图案与第二布线电隔离。

    Method of forming contact hole and method of manufacturing semiconductor memory device using the same
    7.
    发明申请
    Method of forming contact hole and method of manufacturing semiconductor memory device using the same 审中-公开
    形成接触孔的方法和使用其制造半导体存储器件的方法

    公开(公告)号:US20090130842A1

    公开(公告)日:2009-05-21

    申请号:US12289035

    申请日:2008-10-17

    IPC分类号: H01L21/4763 H01L21/302

    摘要: A contact hole forming method and a method of manufacturing semiconductor device using the same may include forming a layer on a substrate; anisotropically etching the layer to form a dummy contact hole exposing the substrate; isotropically etching a sidewall of the dummy contact hole to form a contact hole by alternatively and repeatedly supplying an etching solution including a fluoride salt in a low-polarity organic solvent and deionized water to the dummy contact hole. The methods increase reliability of semiconductor memory devices.

    摘要翻译: 接触孔形成方法和使用其的半导体器件的制造方法可以包括在衬底上形成层; 各向异性地蚀刻该层以形成暴露该衬底的虚拟接触孔; 各向同性地蚀刻虚拟接触孔的侧壁,通过交替地反复地提供包含氟化物盐在低极性有机溶剂中的蚀刻溶液和去离子水形成接触孔到虚拟接触孔。 这些方法提高了半导体存储器件的可靠性。