Method and apparatus for pipelined conversions in touch sensing systems
    1.
    发明授权
    Method and apparatus for pipelined conversions in touch sensing systems 有权
    触摸传感系统中流水线转换的方法和装置

    公开(公告)号:US09405409B1

    公开(公告)日:2016-08-02

    申请号:US13341285

    申请日:2011-12-30

    摘要: A touch sensing system and methods of operating the same for pipelined conversions are provided. In one embodiment, the method includes: (i) configuring a capacitive sensing system including a plurality of capacitive sensing elements for a first conversion; (ii) sensing capacitance in the capacitive sensing elements, and converting the capacitance sensed in the capacitive sensing elements to a digital, first conversion result; and (iii) while converting the capacitance sensed to the first conversion result, configuring the capacitive sensing system. In another embodiment, the capacitive sensing system includes a plurality of channels, and sensing capacitance and converting the capacitance sensed to the first conversion result includes integrating analog signals from the capacitive sensing elements for one of the plurality of channels while converting the integrated signal for another of the plurality of channels to a digital subconversion result.

    摘要翻译: 提供了一种触摸传感系统及其操作方法,用于流水线转换。 在一个实施例中,该方法包括:(i)配置包括用于第一转换的多个电容感测元件的电容感测系统; (ii)感测电容感测元件中的电容,以及将在电容感测元件中感测到的电容转换为数字的第一转换结果; 以及(iii)在将感测到的电容转换为第一转换结果的同时,配置电容感测系统。 在另一个实施例中,电容感测系统包括多个通道,并且感测电容并将感测的电容转换为第一转换结果包括对来自多个通道之一的电容感应元件的模拟信号进行积分,同时将另一个 的数字子转换结果。

    Programmable memory with skewed replica and redundant bits for reset control
    2.
    发明授权
    Programmable memory with skewed replica and redundant bits for reset control 有权
    具有偏移副本的可编程存储器和用于复位控制的冗余位

    公开(公告)号:US08842482B1

    公开(公告)日:2014-09-23

    申请号:US13538291

    申请日:2012-06-29

    IPC分类号: G11C7/06 G11C11/34 G11C16/04

    摘要: Embodiments of a circuit and method for setting initial trim bits in an integrated circuit (IC) are described. The circuit includes a memory array including a plurality of trim bit cells to store and provide trim bits to trim registers in a main circuit of the IC following energizing of the IC. The memory array further includes replica bit circuitry to generate a number of replica bits. A logic circuit coupled to the memory array and the main circuit of the IC is configured to receive the replica bits, and to provide a signal to the IC that indicates when the trim bits are valid. In one embodiment, the circuit further includes redundancy check logic configured to receive a number of the trim bits from the memory array, compare the number of trim bits to a pre-determined or computed value, and to provide a BITS_OK signal to the logic circuit.

    摘要翻译: 描述用于设置集成电路(IC)中的初始修整位的电路和方法的实施例。 该电路包括存储器阵列,该存储器阵列包括多个修整位单元,以在IC通电之后存储并提供修整位以修剪IC的主电路中的寄存器。 存储器阵列还包括复制位电路以产生多个复制位。 耦合到存储器阵列和IC的主电路的逻辑电路被配置为接收复制位,并且向IC提供指示修剪位何时有效的信号。 在一个实施例中,电路还包括冗余校验逻辑,其被配置为从存储器阵列接收多个修剪位,将修整位的数目与预定或计算的值进行比较,并向逻辑电路提供BITS_OK信号 。

    Downstream interface ports for connecting to USB capable devices
    3.
    发明授权
    Downstream interface ports for connecting to USB capable devices 有权
    用于连接USB设备的下行接口端口

    公开(公告)号:US08645598B2

    公开(公告)日:2014-02-04

    申请号:US13617161

    申请日:2012-09-14

    IPC分类号: G06F13/12 G06F13/00

    CPC分类号: G06F13/4072 G06F2213/0042

    摘要: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.

    摘要翻译: 至少一个下游接口可以被配置为同时连接到符合USB 3.0的设备和符合USB 2.0的设备。 该接口可以用于经由下游端口与符合USB 3.0的设备进行通信,同时通过下游端口与USB 2.0兼容设备通信。

    UTILIZING USB RESOURCES
    4.
    发明申请
    UTILIZING USB RESOURCES 有权
    利用USB资源

    公开(公告)号:US20130145056A1

    公开(公告)日:2013-06-06

    申请号:US13617161

    申请日:2012-09-14

    IPC分类号: G06F3/00

    CPC分类号: G06F13/4072 G06F2213/0042

    摘要: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.

    摘要翻译: 至少一个下游接口可以被配置为同时连接到符合USB 3.0的设备和符合USB 2.0的设备。 该接口可以用于经由下游端口与符合USB 3.0的设备进行通信,同时通过下游端口与USB 2.0兼容设备通信。

    SYSTEM AND METHOD FOR SYNCHRONIZATION OF TOUCH PANEL DEVICES
    5.
    发明申请
    SYSTEM AND METHOD FOR SYNCHRONIZATION OF TOUCH PANEL DEVICES 有权
    触控面板设备同步的系统和方法

    公开(公告)号:US20120256852A1

    公开(公告)日:2012-10-11

    申请号:US13238242

    申请日:2011-09-21

    IPC分类号: G06F3/041

    CPC分类号: G06F3/0416

    摘要: A system and method for synchronization of touch-panel devices is described. In one embodiment, the system includes a first controller device configured to control operations of a first portion of a touch-panel device such that the first controller device is further configured to generate a single master timing signal. The single master timing signal is configured to synchronize operation of the first controller device and a second controller device that is configured to control operations of a second portion of a touch-panel device.

    摘要翻译: 描述了用于触摸面板设备的同步的系统和方法。 在一个实施例中,系统包括被配置为控制触摸面板设备的第一部分的操作的第一控制器设备,使得第一控制器设备进一步被配置为生成单个主定时信号。 单个主定时信号被配置为使第一控制器设备和被配置为控制触摸面板设备的第二部分的操作的第二控制器设备的操作同步。

    Utilitzing USB Resources
    6.
    发明申请
    Utilitzing USB Resources 有权
    利用USB资源

    公开(公告)号:US20120084470A1

    公开(公告)日:2012-04-05

    申请号:US13076733

    申请日:2011-03-31

    IPC分类号: G06F13/10

    CPC分类号: G06F13/4072 G06F2213/0042

    摘要: At least one downstream interface may be configured to be simultaneously connected to both a USB 3.0 compliant device and a USB 2.0 compliant device. The interface may be used for communicating with a USB 3.0 compliant device via a downstream port and simultaneously communicating with a USB 2.0 compliant device via the downstream port.

    摘要翻译: 至少一个下游接口可以被配置为同时连接到符合USB 3.0的设备和符合USB 2.0的设备。 该接口可以用于经由下游端口与符合USB 3.0的设备进行通信,同时通过下游端口与USB 2.0兼容设备通信。

    NOISE DETECTION FOR A CAPACITANCE SENSING PANEL
    7.
    发明申请
    NOISE DETECTION FOR A CAPACITANCE SENSING PANEL 有权
    电容感应面板的噪声检测

    公开(公告)号:US20120256638A1

    公开(公告)日:2012-10-11

    申请号:US13309674

    申请日:2011-12-02

    IPC分类号: G01R29/26

    CPC分类号: G06F3/0418 G01R27/2605

    摘要: An embodiment of a method for detecting noise for a capacitance sensing panel may comprise generating an input signal based on a noise signal, performing a series of measurements for measuring capacitances from a capacitive sensor sensitive to the noise signal, and controlling timing for at least one of the subconversions based on the input signal.

    摘要翻译: 用于检测电容感测面板的噪声的方法的实施例可以包括基于噪声信号生成输入信号,执行一系列测量,以测量来自对噪声信号敏感的电容传感器的电容,以及控制至少一个 基于输入信号的子转换。

    System and method for synchronization of touch panel devices
    8.
    发明授权
    System and method for synchronization of touch panel devices 有权
    触摸屏设备同步的系统和方法

    公开(公告)号:US08947377B2

    公开(公告)日:2015-02-03

    申请号:US13238242

    申请日:2011-09-21

    IPC分类号: G06F3/041

    CPC分类号: G06F3/0416

    摘要: A system and method for synchronization of touch-panel devices is described. In one embodiment, the system includes a first controller device configured to control operations of a first portion of a touch-panel device such that the first controller device is further configured to generate a single master timing signal. The single master timing signal is configured to synchronize operation of the first controller device and a second controller device that is configured to control operations of a second portion of a touch-panel device.

    摘要翻译: 描述了用于触摸面板设备的同步的系统和方法。 在一个实施例中,系统包括被配置为控制触摸面板设备的第一部分的操作的第一控制器设备,使得第一控制器设备进一步被配置为生成单个主定时信号。 单个主定时信号被配置为使第一控制器设备和被配置为控制触摸面板设备的第二部分的操作的第二控制器设备的操作同步。