公开(公告)号：US08767444B2

公开(公告)日：2014-07-01

申请号：US11389767

申请日：2006-03-27

申请人： David Nelson ,  Keith Golke ,  Harry H L Liu ,  Michael Liu

发明人： David Nelson ,  Keith Golke ,  Harry H L Liu ,  Michael Liu

IPC分类号： G11C11/41 ,  G11C11/412 ,  G11C11/413 ,  G11C11/417 ,  G11C7/02 ,  G11C7/24 ,  G11C5/02 ,  G11C5/06

CPC分类号： G11C11/4125 ,  G11C5/005

摘要： A radiation hardened memory element includes at least two delay elements for maintaining radiation hardness. In an example, the memory element is an SRAM cell. Both delays are coupled together in series so that if either one of the delays fails, a delay will still be maintained within the SRAM cell. The critical areas of the delays may be positioned so that a common line of sight cannot be made between each delay and a circuit node.

摘要翻译： 辐射硬化的存储元件包括用于保持辐射硬度的至少两个延迟元件。 在一个示例中，存储器元件是SRAM单元。 两个延迟都串联在一起，使得如果任一个延迟失败，则在SRAM单元内仍将保持延迟。 延迟的关键区域可以定位成使得在每个延迟和电路节点之间不能产生共同的视线。

公开(公告)号：US07693001B2

公开(公告)日：2010-04-06

申请号：US12013856

申请日：2008-01-14

申请人： Keith W. Golke ,  Harry H L Liu ,  David K. Nelson

发明人： Keith W. Golke ,  Harry H L Liu ,  David K. Nelson

IPC分类号： G11C8/00

CPC分类号： G11C7/02 ,  G11C5/005 ,  G11C8/14 ,  G11C11/4125

摘要： A Static Random Access Memory (SRAM) having a split write control is described. The SRAM includes bit, write, and write-word lines. Each memory cell within the SRAM includes a delay which is coupled to a dedicated write-word line. When a cell is not being written, its delay receives a delay signal on its associated write-word line, which increases the response time of the cell. When a cell is to be written, however, its delay receives a bypass signal on its associated write-word line, which decreases the response time of the SRAM cell.

摘要翻译： 描述具有分离写入控制的静态随机存取存储器（SRAM）。 SRAM包括位，写和写字线。 SRAM内的每个存储单元包括耦合到专用写字线的延迟。 当单元未被写入时，其延迟在其相关联的写字线上接收延迟信号，这增加了单元的响应时间。 然而，当单元被写入时，其延迟在其相关的写字线上接收旁路信号，这降低了SRAM单元的响应时间。

公开(公告)号：US07322015B2

公开(公告)日：2008-01-22

申请号：US11029308

申请日：2005-01-05

申请人： Harry H. L. Liu ,  Keith W. Golke ,  Eric E. Vogt ,  Michael S. Liu

发明人： Harry H. L. Liu ,  Keith W. Golke ,  Eric E. Vogt ,  Michael S. Liu

IPC分类号： G06F17/50 ,  G06G7/62

CPC分类号： G06F17/5036

摘要： Behaviors of a transistor during a dose rate event can be modeled using a circuit simulation software package. A subcircuit model replaces a transistor in a circuit design to be simulated. The subcircuit model can be in the form of a schematic-based representation or a netlist. The subcircuit model provides a model of a source junction and a drain junction in the transistor during the dose rate event. The subcircuit model also includes the size of the transistor being replaced and the dose rate of the dose rate event. Once the transistor is replaced with the subcircuit model, a dose rate simulation may be performed to determine the dose rate hardness of the circuit design.

摘要翻译： 在剂量率事件期间晶体管的行为可以使用电路仿真软件包进行建模。 子电路模型取代要仿真的电路设计中的晶体管。 子电路模型可以是基于原理图的表示形式或网表。 子电路模型在剂量率事件期间提供晶体管中的源极结和漏极结的模型。 子电路模型还包括被替换的晶体管的尺寸和剂量率事件的剂量率。 一旦晶体管被子电路模型替代，可以执行剂量率模拟来确定电路设计的剂量率硬度。

公开(公告)号：US07286393B2

公开(公告)日：2007-10-23

申请号：US11096179

申请日：2005-03-31

申请人： Owen J. Hynes ,  Romney Katti ,  Harry H. L. Liu ,  Michael S. Liu

发明人： Owen J. Hynes ,  Romney Katti ,  Harry H. L. Liu ,  Michael S. Liu

IPC分类号： G11C11/00

CPC分类号： G11C11/16

摘要： A device is connected in parallel with an MTJ structure of an MRAM bit to shunt photocurrent away from and/or limit voltage across the MTJ structure during a dose rate event. The device may include at least one transistor and/or at least one diode. One device may be used to protect an entire row and/or column of MRAM bits. As a result, the MRAM bits are protected during a dose rate event.

摘要翻译： 器件与MRAM位的MTJ结构并联连接，以在剂量率事件期间跨越MTJ结构分流光电流和/或限制跨越MTJ结构的电压。 该器件可以包括至少一个晶体管和/或至少一个二极管。 一个设备可用于保护MRAM位的整个行和/或列。 结果，在剂量率事件期间MRAM位被保护。

公开(公告)号：US07589308B2

公开(公告)日：2009-09-15

申请号：US11469803

申请日：2006-09-01

申请人： Harry H L Liu ,  Anuj Kohli ,  Michael S Liu

发明人： Harry H L Liu ,  Anuj Kohli ,  Michael S Liu

IPC分类号： H01J40/14 ,  H01L23/62

CPC分类号： H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and apparatus for regulating photocurrents is described. A photocurrent regulator may include a transistor having an associated cross-sectional area. The photocurrent regulator is coupled between an integrated circuit and a voltage source. When a dose rate event occurs within the integrated circuit, the photocurrent regulator, via the cross-sectional area, regulates a recombination path to the voltage source. Consequently, photocurrents within the integrated circuit are regulated, preventing permanent damage within the integrated circuit.

摘要翻译： 描述了用于调节光电流的方法和装置。 光电流调节器可以包括具有相关横截面积的晶体管。 光电流调节器耦合在集成电路和电压源之间。 当在集成电路内发生剂量率事件时，光电流调节器通过横截面积调节到电压源的复合路径。 因此，集成电路内的光电流被调节，防止集成电路内的永久性损坏。