公开(公告)号：US07499689B2

公开(公告)日：2009-03-03

申请号：US11727217

申请日：2007-03-26

Applicant: Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Astel Henshaw

Inventor： Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Astel Henshaw

IPC: H04B7/00

CPC classification number: H04B1/04 ,  H03C3/0925 ,  H03C3/0933 ,  H03D7/165 ,  H03D2200/0047 ,  H03J1/005 ,  H03L7/1976

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.

公开(公告)号：US20080278245A1

公开(公告)日：2008-11-13

申请号：US12216732

申请日：2008-07-10

Applicant: Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

Inventor： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

IPC: H03L7/00

CPC classification number: H03L7/099 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/199

Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.

Abstract translation: 在不增加功耗或芯片尺寸的情况下，实现将包括环路滤波器的PLL电路并入半导体芯片的RF IC。 RF IC包括能够切换振荡频带的VCO，可变分频器，相位比较器和环路滤波器，其包含在PLL环路中。 判别电路基于参考信号鉴别来自可变分频器的输出信号的相位的引导或滞后，并且自动频带选择电路根据鉴别电路的输出产生用于切换VCO的频带的信号。 在通过平分算法切换VCO的频带的同时，RF IC检测最佳频带，并向其添加偏移量以确定最终可用频带。

公开(公告)号：US20070161360A1

公开(公告)日：2007-07-12

申请号：US11727217

申请日：2007-03-26

Applicant: Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Henshaw

Inventor： Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Henshaw

IPC: H04B7/00

CPC classification number: H04B1/04 ,  H03C3/0925 ,  H03C3/0933 ,  H03D7/165 ,  H03D2200/0047 ,  H03J1/005 ,  H03L7/1976

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.

Abstract translation: 在使用偏移PLL结构并且包括产生中频信号的振荡电路和分频器电路的通信半导体集成电路器件中，振荡器电路包括振荡器，可编程分频器，其根据频率分频振荡信号 信息，检测可编程分频器的输出信号和参考信号之间的相位差的相位比较器，以及用于输出指示相位差并控制振荡器的振荡频率的信号的频率控制单元，其中分频 基于与使用频带和模式信息相关的频带信息以及频道信息生成整数部分I和分数部分F / G，并产生分频比信息，从而将其分配给可编程分频器。

公开(公告)号：US20060014513A1

公开(公告)日：2006-01-19

申请号：US11181876

申请日：2005-07-15

Applicant: Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Henshaw

Inventor： Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Henshaw

IPC: H04B1/26

CPC classification number: H04B1/04 ,  H03C3/0925 ,  H03C3/0933 ,  H03D7/165 ,  H03D2200/0047 ,  H03J1/005 ,  H03L7/1976

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.

公开(公告)号：US20050068111A1

公开(公告)日：2005-03-31

申请号：US10495611

申请日：2002-11-13

Applicant: Masumi Kasahara ,  Hirotaka Osawa ,  Robert Henshaw

Inventor： Masumi Kasahara ,  Hirotaka Osawa ,  Robert Henshaw

IPC: H03L7/10 ,  H03L7/099 ,  H03L7/187 ,  H04B1/26 ,  H04B1/40 ,  H03L7/00

CPC classification number: H03L7/187 ,  H03L7/099

Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.

Abstract translation: 在通信半导体集成电路器件中，PLL电路的振荡器（VCO10）可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器（18）中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。

公开(公告)号：US07499688B2

公开(公告)日：2009-03-03

申请号：US11727216

申请日：2007-03-26

Applicant: Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Astel Henshaw

Inventor： Toshiya Uozumi ,  Yasuyuki Kimura ,  Hirotaka Osawa ,  Satoru Yamamoto ,  Robert Astel Henshaw

IPC: H04B7/00

CPC classification number: H04B1/04 ,  H03C3/0925 ,  H03C3/0933 ,  H03D7/165 ,  H03D2200/0047 ,  H03J1/005 ,  H03L7/1976

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.

Abstract translation: 在使用偏移PLL结构并且包括产生中频信号的振荡电路和分频器电路的通信半导体集成电路器件中，振荡器电路包括振荡器，可编程分频器，其根据频率分频振荡信号 信息，检测可编程分频器的输出信号和参考信号之间的相位差的相位比较器，以及用于输出指示相位差并控制振荡器的振荡频率的信号的频率控制单元，其中分频 基于与使用频带和模式信息相关的频带信息以及频道信息生成整数部分I和分数部分F / G，并产生分频比信息，从而将其分配给可编程分频器。

公开(公告)号：US20070052488A1

公开(公告)日：2007-03-08

申请号：US11592982

申请日：2006-11-06

Applicant: Masumi Kasahara ,  Hirotaka Osawa ,  Robert Henshaw

Inventor： Masumi Kasahara ,  Hirotaka Osawa ,  Robert Henshaw

IPC: H03L7/00

CPC classification number: H03L7/187 ,  H03L7/099

Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.

Abstract translation: 在通信半导体集成电路器件中，PLL电路的振荡器（VCO10）可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器（18）中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。

公开(公告)号：US07148764B2

公开(公告)日：2006-12-12

申请号：US10495611

申请日：2002-11-13

Applicant: Masumi Kasahara ,  Hirotaka Osawa ,  Robert Astle Henshaw

Inventor： Masumi Kasahara ,  Hirotaka Osawa ,  Robert Astle Henshaw

IPC: H03B1/00

CPC classification number: H03L7/187 ,  H03L7/099

Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.

Abstract translation: 在通信半导体集成电路器件中，PLL电路的振荡器（VCO10）可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器（18）中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。

公开(公告)号：US07504903B2

公开(公告)日：2009-03-17

申请号：US11592982

申请日：2006-11-06

Applicant: Masumi Kasahara ,  Hirotaka Osawa ,  Robert Astle Henshaw

Inventor： Masumi Kasahara ,  Hirotaka Osawa ,  Robert Astle Henshaw

IPC: H03B1/00

CPC classification number: H03L7/187 ,  H03L7/099

Abstract: In a communication semiconductor integrated circuit device, an oscillator of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage. When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.

Abstract translation: 在通信半导体集成电路器件中，PLL电路的振荡器可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。

公开(公告)号：US20060267699A1

公开(公告)日：2006-11-30

申请号：US11501778

申请日：2006-08-10

Applicant: Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

Inventor： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

IPC: H03L7/00

CPC classification number: H03L7/099 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/199

Abstract: An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.

Abstract translation: 在不增加功耗或芯片尺寸的情况下，实现将包括环路滤波器的PLL电路并入半导体芯片的RF IC。 RF IC包括能够切换振荡频带的VCO，可变分频器，相位比较器和环路滤波器，其包含在PLL环路中。 判别电路基于参考信号鉴别来自可变分频器的输出信号的相位的引导或滞后，并且自动频带选择电路根据鉴别电路的输出产生用于切换VCO的频带的信号。 在通过平分算法切换VCO的频带的同时，RF IC检测最佳频带，并向其添加偏移量以确定最终可用频带。