公开(公告)号：US20130093003A1

公开(公告)日：2013-04-18

申请号：US13607255

申请日：2012-09-07

申请人： Hiroyuki IRIFUNE ,  Wataru SAITO ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Hiroshi OHTA ,  Junji SUZUKI

发明人： Hiroyuki IRIFUNE ,  Wataru SAITO ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Hiroshi OHTA ,  Junji SUZUKI

IPC分类号： H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/7811

摘要： A semiconductor device includes first, second, and third semiconductor layers each having multiple diffusion layers. The first direction widths of the first diffusion layers are the same. The amount of impurity within the first diffusion layers gradually increases from the bottom end towards the top end of the first semiconductor layer. The first direction widths of the second diffusion layers are the same. The amounts of impurity within the second diffusion layers are the same. The first direction widths of the third diffusion layers are narrower than the first direction widths of the first diffusion layers and the first direction widths of the second diffusion layers at the same level, and gradually become narrower from the bottom end towards the top end of the third semiconductor layer. The amount of impurity within the third. diffusion layers are the same.

摘要翻译： 半导体器件包括各自具有多个扩散层的第一，第二和第三半导体层。 第一扩散层的第一方向宽度相同。 第一扩散层内的杂质量从第一半导体层的底端向顶端逐渐增加。 第二扩散层的第一方向宽度相同。 第二扩散层内的杂质量相同。 第三扩散层的第一方向宽度比第一扩散层的第一方向宽度和第二扩散层的第一方向宽度在相同水平处窄，并且从第一扩散层的第一方向宽度逐渐变窄到 第三半导体层。 第三者内的杂质量。 扩散层是相同的。

公开(公告)号：US20120074491A1

公开(公告)日：2012-03-29

申请号：US13234802

申请日：2011-09-16

申请人： Hiroshi OHTA ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Junji SUZUKI ,  Hiroyuki IRIFUNE ,  Wataru SAITO ,  Syotaro ONO

发明人： Hiroshi OHTA ,  Yasuto SUMI ,  Kiyoshi KIMURA ,  Junji SUZUKI ,  Hiroyuki IRIFUNE ,  Wataru SAITO ,  Syotaro ONO

IPC分类号： H01L27/088

CPC分类号： H01L29/78 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/7811 ,  H01L29/7813

摘要： In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.

摘要翻译： 通常，根据一个实施例，功率半导体器件包括在第一半导体层上的第一导电类型的第一柱状区域，第二柱状区域和外延层。 第一支柱区域由第一导电类型的多个第一支柱层和沿第一方向交替布置的第一导电类型的多个第二支柱层组成。 第二柱状区域沿着第一方向与第一柱状区域相邻，并且具有第二导电型的第三柱状层，第一导电型的第四柱状层和第二导电型的第五柱状层 沿着第一个方向。 多个第二导电类型的第二基极层分别电连接到第三柱层和第五柱层上并彼此间隔开。

公开(公告)号：US20110291181A1

公开(公告)日：2011-12-01

申请号：US13149345

申请日：2011-05-31

申请人： Hiroyuki IRIFUNE ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Hiroshi Ohta

发明人： Hiroyuki IRIFUNE ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Hiroshi Ohta

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66712 ,  H01L29/0626 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

摘要： According to one embodiment, a semiconductor device including a cell region and a terminal region includes a first semiconductor region of a first conductivity type, semiconductor pillars of the first and a second conductivity type, a second semiconductor region of the second conductivity type, and a third semiconductor region of the first conductivity type. The semiconductor pillars of the first and second conductivity type are and arranged alternately on the first semiconductor region. The second semiconductor region is provided on the semiconductor pillar of the second conductivity type. The third semiconductor region is provided on the second semiconductor region. A semiconductor pillar other than a semiconductor pillar most proximal to the terminal region is provided in a stripe configuration. The semiconductor pillar most proximal to the terminal region includes regions having a high and a low impurity concentration. The regions are provided alternately.

摘要翻译： 根据一个实施例，包括单元区域和端子区域的半导体器件包括第一导电类型的第一半导体区域，第一和第二导电类型的半导体柱，第二导电类型的第二半导体区域和 第一导电类型的第三半导体区域。 第一和第二导电类型的半导体柱交替地布置在第一半导体区域上。 第二半导体区域设置在第二导电类型的半导体柱上。 第三半导体区域设置在第二半导体区域上。 最靠近端子区域的半导体柱以外的半导体柱设置成条状。 最靠近末端区域的半导体柱包括具有高和低杂质浓度的区域。 这些区域交替地设置。

公开(公告)号：US08487374B2

公开(公告)日：2013-07-16

申请号：US13234802

申请日：2011-09-16

申请人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune ,  Wataru Saito ,  Syotaro Ono

发明人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune ,  Wataru Saito ,  Syotaro Ono

IPC分类号： H01L29/66

CPC分类号： H01L29/78 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/7811 ,  H01L29/7813

摘要： In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other.

摘要翻译： 通常，根据一个实施例，功率半导体器件包括在第一半导体层上的第一导电类型的第一柱状区域，第二柱状区域和外延层。 第一支柱区域由第一导电类型的多个第一支柱层和沿第一方向交替布置的第一导电类型的多个第二支柱层组成。 第二柱状区域沿着第一方向与第一柱状区域相邻，并且具有第二导电型的第三柱状层，第一导电型的第四柱状层和第二导电型的第五柱状层 沿着第一个方向。 多个第二导电类型的第二基极层分别电连接到第三柱层和第五柱层上并彼此间隔开。

公开(公告)号：US20120241823A1

公开(公告)日：2012-09-27

申请号：US13424344

申请日：2012-03-19

申请人： HIROSHI OHTA ,  YASUTO SUMI ,  KIYOSHI KIMURA ,  JUNJI SUZUKI ,  HIROYUKI IRIFUNE

发明人： HIROSHI OHTA ,  YASUTO SUMI ,  KIYOSHI KIMURA ,  JUNJI SUZUKI ,  HIROYUKI IRIFUNE

IPC分类号： H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4238 ,  H01L29/66712

摘要： A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer provided thereon, mutually separated columnar third semiconductor layers of a second conductivity type extending within the second semiconductor layer, island-like fourth semiconductor layers of the second conductivity type provided on the third semiconductor layers, fifth semiconductor layers of the first conductivity type, sixth semiconductor layers of the second conductivity type, a gate electrode, a first electrode, and a second electrode. The fifth semiconductor layers are selectively provided on the fourth semiconductor layers. The sixth semiconductor layer electrically connects two adjacent fourth semiconductor layers. The first electrode is in electrical connection with the first semiconductor. The second electrode is in electrical connection with the fourth semiconductor layers and the fifth semiconductor layers via the openings in the gate electrode.

摘要翻译： 功率半导体器件包括第一导电类型的第一半导体层，设置在其上的第二半导体层，在第二半导体层内延伸的第二导电类型的相互分离的柱状第三半导体层，第二导电类型的岛状第四半导体层 提供在第三半导体层上的第一半导体层，第一导电类型的第五半导体层，第二导电类型的第六半导体层，栅电极，第一电极和第二电极。 第五半导体层选择性地设置在第四半导体层上。 第六半导体层电连接两个相邻的第四半导体层。 第一电极与第一半导体电连接。 第二电极经由栅电极中的开口与第四半导体层和第五半导体层电连接。

公开(公告)号：US08643056B2

公开(公告)日：2014-02-04

申请号：US13229203

申请日：2011-09-09

申请人： Kiyoshi Kimura ,  Yasuto Sumi ,  Hiroshi Ohta ,  Hiroyuki Irifune

发明人： Kiyoshi Kimura ,  Yasuto Sumi ,  Hiroshi Ohta ,  Hiroyuki Irifune

IPC分类号： H01L29/66

CPC分类号： H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/872

摘要： A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers. The plurality of third second-conductivity-type pillar layers are arranged on the first epitaxial layer.

摘要翻译： 功率半导体器件包括第一导电类型的第一半导体层，第一漂移层和第二漂移层。 第一漂移层包括第一导电类型的第一外延层，多个第一第一导电型柱层和多个第一第二导电型柱层。 第二漂移层形成在第一漂移层上，并且包括第一导电类型的第二外延层，多个第二第二导电型柱层，多个第二第一导电型柱层，多个第二导电型柱层 第三第二导电型柱层和多个第三第一导电型柱层。 多个第二第二导电型柱层与第一第二导电型柱层连接。 多个第二第一导电型柱层与第一第一导电型柱层连接。 多个第三第二导电型柱层布置在第一外延层上。

公开(公告)号：US08872261B2

公开(公告)日：2014-10-28

申请号：US13607255

申请日：2012-09-07

申请人： Hiroyuki Irifune ,  Wataru Saito ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Hiroshi Ohta ,  Junji Suzuki

发明人： Hiroyuki Irifune ,  Wataru Saito ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Hiroshi Ohta ,  Junji Suzuki

IPC分类号： H01L29/66 ,  H01L29/78

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/7811

摘要： A semiconductor device includes first, second, and third semiconductor layers each having multiple diffusion layers. The first direction widths of the first diffusion layers are the same. The amount of impurity within the first diffusion layers gradually increases from the bottom end towards the top end of the first semiconductor layer. The first direction widths of the second diffusion layers are the same. The amounts of impurity within the second diffusion layers are the same. The first direction widths of the third diffusion layers are narrower than the first direction widths of the first diffusion layers and the first direction widths of the second diffusion layers at the same level, and gradually become narrower from the bottom end towards the top end of the third semiconductor layer. The amount of impurity within the third diffusion layers are the same.

摘要翻译： 半导体器件包括各自具有多个扩散层的第一，第二和第三半导体层。 第一扩散层的第一方向宽度是相同的。 第一扩散层内的杂质量从第一半导体层的底端向顶端逐渐增加。 第二扩散层的第一方向宽度相同。 第二扩散层内的杂质量相同。 第三扩散层的第一方向宽度比第一扩散层的第一方向宽度和第二扩散层的第一方向宽度在相同水平处窄，并且从第一扩散层的第一方向宽度逐渐变窄到 第三半导体层。 第三扩散层内的杂质量相同。

公开(公告)号：US08680606B2

公开(公告)日：2014-03-25

申请号：US13424344

申请日：2012-03-19

申请人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune

发明人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune

IPC分类号： H01L29/66

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4238 ,  H01L29/66712

摘要： A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer provided thereon, mutually separated columnar third semiconductor layers of a second conductivity type extending within the second semiconductor layer, island-like fourth semiconductor layers of the second conductivity type provided on the third semiconductor layers, fifth semiconductor layers of the first conductivity type, sixth semiconductor layers of the second conductivity type, a gate electrode, a first electrode, and a second electrode. The fifth semiconductor layers are selectively provided on the fourth semiconductor layers. The sixth semiconductor layer electrically connects two adjacent fourth semiconductor layers. The first electrode is in electrical connection with the first semiconductor. The second electrode is in electrical connection with the fourth semiconductor layers and the fifth semiconductor layers via the openings in the gate electrode.

摘要翻译： 功率半导体器件包括第一导电类型的第一半导体层，设置在其上的第二半导体层，在第二半导体层内延伸的第二导电类型的相互分离的柱状第三半导体层，第二导电类型的岛状第四半导体层 提供在第三半导体层上的第一半导体层，第一导电类型的第五半导体层，第二导电类型的第六半导体层，栅电极，第一电极和第二电极。 第五半导体层选择性地设置在第四半导体层上。 第六半导体层电连接两个相邻的第四半导体层。 第一电极与第一半导体电连接。 第二电极经由栅电极中的开口与第四半导体层和第五半导体层电连接。

公开(公告)号：US20130069158A1

公开(公告)日：2013-03-21

申请号：US13425258

申请日：2012-03-20

申请人： Hiroshi OHTA ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune ,  Wataru Saito

发明人： Hiroshi OHTA ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Junji Suzuki ,  Hiroyuki Irifune ,  Wataru Saito

IPC分类号： H01L29/78

CPC分类号： H01L29/0623 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7811

摘要： A power semiconductor device includes a high resistance epitaxial layer having a first pillar region and a second pillar region as a drift layer. The first pillar region includes a plurality of first pillars of the first conductivity type and a plurality of second pillars of the second conductivity type disposed alternately along a first direction. The second pillar region is adjacent to the first pillar region along the first direction. The second pillar region includes a third pillar and a fourth pillar of a conductivity type opposite to a conductivity type of the third pillar. A net quantity of impurities in the third pillar is less than a net quantity of impurities in each of the plurality of first pillars. A net quantity of impurities in the fourth pillar is less than the net quantity of impurities in the third pillar.

摘要翻译： 功率半导体器件包括具有第一柱区和第二柱区作为漂移层的高电阻外延层。 第一支柱区域包括多个第一导电类型的第一支柱和沿着第一方向交替布置的多个第二导电类型的第二支柱。 第二柱区域沿着第一方向与第一柱状区域相邻。 第二柱区域包括与第三柱的导电类型相反的导电类型的第三柱和第四柱。 第三支柱中的杂质净量少于多个第一支柱中的每一个中的杂质的净量。 第四柱中净杂质量少于第三柱中杂质的净量。

公开(公告)号：US20120061721A1

公开(公告)日：2012-03-15

申请号：US13229203

申请日：2011-09-09

申请人： Kiyoshi KIMURA ,  Yasuto SUMI ,  Hiroshi OHTA ,  Hiroyuki IRIFUNE

发明人： Kiyoshi KIMURA ,  Yasuto SUMI ,  Hiroshi OHTA ,  Hiroyuki IRIFUNE

IPC分类号： H01L27/082 ,  H01L21/331

CPC分类号： H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/872

摘要： A power semiconductor device includes a first semiconductor layer of a first conductivity type, a first drift layer, and a second drift layer. The first drift layer includes a first epitaxial layer of the first conductivity type, a plurality of first first-conductivity-type pillar layers, and a plurality of first second-conductivity-type pillar layers. The second drift layer is formed on the first drift layer and includes a second epitaxial layer of the first conductivity type, a plurality of second second-conductivity-type pillar layers, a plurality of second first-conductivity-type pillar layers, a plurality of third second-conductivity-type pillar layers, and a plurality of third first-conductivity-type pillar layers. The plurality of second second-conductivity-type pillar layers are connected to the first second-conductivity-type pillar layers. The plurality of second first-conductivity-type pillar layers are connected to the first first-conductivity-type pillar layers. The plurality of third second-conductivity-type pillar layers are arranged on the first epitaxial layer.

摘要翻译： 功率半导体器件包括第一导电类型的第一半导体层，第一漂移层和第二漂移层。 第一漂移层包括第一导电类型的第一外延层，多个第一第一导电型柱层和多个第一第二导电型柱层。 第二漂移层形成在第一漂移层上，并且包括第一导电类型的第二外延层，多个第二第二导电型柱层，多个第二第一导电型柱层，多个第二导电型柱层 第三第二导电型柱层和多个第三第一导电型柱层。 多个第二第二导电型柱层与第一第二导电型柱层连接。 多个第二第一导电型柱层与第一第一导电型柱层连接。 多个第三第二导电型柱层布置在第一外延层上。