公开(公告)号：US08729630B1

公开(公告)日：2014-05-20

申请号：US14146512

申请日：2014-01-02

申请人： Ching-Yao Yang ,  Tsung-Yi Huang ,  Huan-Ping Chu ,  Hung-Der Su

发明人： Ching-Yao Yang ,  Tsung-Yi Huang ,  Huan-Ping Chu ,  Hung-Der Su

IPC分类号： H01L29/66

CPC分类号： H01L29/4238 ,  H01L21/28114 ,  H01L21/823425 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: an isolation structure for defining device regions; a gate with a ring-shaped structure; a drain located outside the ring; and a lightly doped drain, a source, and a body electrode located inside the ring. To increase the sub-threshold voltage at the corners of the gate, the corners are located completely on the isolation structure, or the lightly doped drain is apart from the corners by a predetermined distance.

公开(公告)号：US20130032880A1

公开(公告)日：2013-02-07

申请号：US13197370

申请日：2011-08-03

申请人： Tsung-Yi HUANG ,  Huan-Ping CHU

发明人： Tsung-Yi HUANG ,  Huan-Ping CHU

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0878 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate has an upper surface. The high voltage device includes: a second conductive type buried layer, which is formed in the substrate; a first conductive type well, which is formed between the upper surface and the buried layer; and a second conductive type well, which is connected to the first conductive type well and located at different horizontal positions. The second conductive type well includes a well lower surface, which has a first part and a second part, wherein the first part is directly above the buried layer and electrically coupled to the buried layer; and the second part is not located above the buried layer and forms a PN junction with the substrate.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件形成在第一导电型衬底中，其中衬底具有上表面。 高压器件包括：形成在衬底中的第二导电型掩埋层; 第一导电型阱，其形成在上表面和埋层之间; 以及第二导电型阱，其连接到第一导电类型阱并且位于不同的水平位置。 第二导电类型阱包括井下表面，其具有第一部分和第二部分，其中第一部分直接在掩埋层的上方并电耦合到掩埋层; 并且第二部分不位于掩埋层的上方并与衬底形成PN结。

公开(公告)号：US20120319202A1

公开(公告)日：2012-12-20

申请号：US13161072

申请日：2011-06-15

申请人： Tsung-Yi Huang ,  Huan-Ping Chu

发明人： Tsung-Yi Huang ,  Huan-Ping Chu

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7835 ,  H01L29/0692 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/66659

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate having a device region; a gate, which is located on a surface of the substrate; a second conductive type source and a second conductive type drain in the device region at different sides of the gate respectively; and a second conductive type drift region, which is located in the device region, between the source and the drain. The gate includes: a conductive layer for receiving a gate voltage; and multiple dielectric layers with different thicknesses, located at different horizontal positions. From cross-section view, each dielectric layer is between the conductive layer and the substrate, and the multiple dielectric layers are arranged in an order from thinner to thicker from a side closer to the source to a side closer to the drain.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高电压装置包括：具有器件区域的第一导电型衬底; 位于所述基板的表面上的栅极; 在栅极的不同侧的器件区域中的第二导电类型源极和第二导电类型漏极; 以及位于源极和漏极之间的器件区域中的第二导电类型漂移区。 栅极包括：用于接收栅极电压的导电层; 和具有不同厚度的多个电介质层，位于不同的水平位置。 从横截面图，每个电介质层位于导电层和衬底之间，并且多个电介质层从更靠近源的一侧到靠近漏极的一侧以从更薄到较厚的顺序排列。

公开(公告)号：US20120187483A1

公开(公告)日：2012-07-26

申请号：US13066622

申请日：2011-04-20

申请人： Ching-Yao Yang ,  Tsung-Yi Huang ,  Huan-Ping Chu ,  Hung-Der Su

发明人： Ching-Yao Yang ,  Tsung-Yi Huang ,  Huan-Ping Chu ,  Hung-Der Su

IPC分类号： H01L29/78 ,  H01L21/8232 ,  H01L21/336

CPC分类号： H01L29/4238 ,  H01L21/28114 ,  H01L21/823425 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: an isolation structure for defining device regions; a gate with a ring-shaped structure; a drain located outside the ring; and a lightly doped drain, a source, and a body electrode located inside the ring. To increase the sub-threshold voltage at the corners of the gate, the corners are located completely on the isolation structure, or the lightly doped drain is apart from the corners by a predetermined distance.

摘要翻译： 本发明公开了一种双扩散金属氧化物半导体（DMOS）器件及其制造方法。 DMOS设备包括：用于定义设备区域的隔离结构; 具有环形结构的门; 位于环外的排水沟; 以及位于环内的轻掺杂漏极，源极和体电极。 为了增加栅极角落处的次阈值电压，角部完全位于隔离结构上，或者轻掺杂漏极与角分开预定距离。

公开(公告)号：US09362384B2

公开(公告)日：2016-06-07

申请号：US14559542

申请日：2014-12-03

申请人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

发明人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06

CPC分类号： H01L29/66681 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.

公开(公告)号：US08421150B2

公开(公告)日：2013-04-16

申请号：US13197370

申请日：2011-08-03

申请人： Tsung-Yi Huang ,  Huan-Ping Chu

发明人： Tsung-Yi Huang ,  Huan-Ping Chu

IPC分类号： H01L29/76 ,  H01L31/062

CPC分类号： H01L29/0878 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835

摘要： The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate has an upper surface. The high voltage device includes: a second conductive type buried layer, which is formed in the substrate; a first conductive type well, which is formed between the upper surface and the buried layer; and a second conductive type well, which is connected to the first conductive type well and located at different horizontal positions. The second conductive type well includes a well lower surface, which has a first part and a second part, wherein the first part is directly above the buried layer and electrically coupled to the buried layer; and the second part is not located above the buried layer and forms a PN junction with the substrate.

摘要翻译： 本发明公开了一种高压器件及其制造方法。 高压器件形成在第一导电型衬底中，其中衬底具有上表面。 高压器件包括：形成在衬底中的第二导电型掩埋层; 第一导电型阱，其形成在上表面和埋层之间; 以及第二导电型阱，其连接到第一导电类型阱并且位于不同的水平位置。 第二导电类型阱包括井下表面，其具有第一部分和第二部分，其中第一部分直接在掩埋层的上方并电耦合到掩埋层; 并且第二部分不位于掩埋层的上方并与衬底形成PN结。

公开(公告)号：US20110220997A1

公开(公告)日：2011-09-15

申请号：US12720834

申请日：2010-03-10

申请人： Tsung-Yi Huang ,  Huan-Ping Chu ,  Ching-Yao Yang ,  Hung-Der Su

发明人： Tsung-Yi Huang ,  Huan-Ping Chu ,  Ching-Yao Yang ,  Hung-Der Su

IPC分类号： H01L29/78 ,  H01L21/8249

CPC分类号： H01L29/7816 ,  H01L29/0878 ,  H01L29/66681

摘要： The present invention discloses an LDMOS device having an increased punch-through voltage and a method for making same. The LDMOS device includes: a substrate; a well of a first conductive type formed in the substrate; an isolation region formed in the substrate; a body region of a second conductive type in the well; a source in the body region; a drain in the well; a gate structure on the substrate; and a first conductive type dopant region beneath the body region, for increasing a punch-through voltage.

摘要翻译： 本发明公开了一种具有增加的穿通电压的LDMOS器件及其制造方法。 LDMOS器件包括：衬底; 在基板中形成的第一导电类型的阱; 形成在衬底中的隔离区; 井中的第二导电类型的体区; 身体的一个来源; 井中排水 基板上的栅极结构; 以及在身体区域下面的第一导电型掺杂区域，用于增加穿通电压。

公开(公告)号：US20110215403A1

公开(公告)日：2011-09-08

申请号：US12715501

申请日：2010-03-02

申请人： Tsung-Yi Huang ,  Huan-Ping Chu ,  Ching-Yao Yang ,  Hug-Der Su

发明人： Tsung-Yi Huang ,  Huan-Ping Chu ,  Ching-Yao Yang ,  Hug-Der Su

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/78 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/7833 ,  H01L29/7835

摘要： The present invention discloses a high voltage metal oxide semiconductor (HVMOS) device and a method for making same. The high voltage metal oxide semiconductor device comprises: a substrate; a gate structure on the substrate; a well in the substrate, the well defining a device region from top view; a first drift region in the well; a source in the well; a drain in the first drift region, the drain being separated from the gate structure by a part of the first drift region; and a P-type dopant region not covering all the device region, wherein the P-type dopant region is formed by implanting a P-type dopant for enhancing the breakdown voltage of the HVMOS device (for N-type HVMOS device) or reducing the ON resistance of the HVMOS device (for P-type HVMOS device).

摘要翻译： 本发明公开了一种高电压金属氧化物半导体（HVMOS）器件及其制造方法。 高电压金属氧化物半导体器件包括：衬底; 基板上的栅极结构; 在衬底中的阱，阱从顶视图限定器件区域; 井中的第一漂移区; 井中的来源 所述第一漂移区域中的漏极，所述漏极由所述第一漂移区域的一部分与所述栅极结构分离; 以及不覆盖所有器件区域的P型掺杂剂区域，其中通过注入用于增强HVMOS器件的击穿电压（对于N型HVMOS器件）的P型掺杂剂形成P型掺杂剂区域，或者减少 HVMOS器件的导通电阻（P型HVMOS器件）。

公开(公告)号：US20150079755A1

公开(公告)日：2015-03-19

申请号：US14559542

申请日：2014-12-03

申请人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

发明人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

IPC分类号： H01L29/66

CPC分类号： H01L29/66681 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.

摘要翻译： 本发明公开了一种双扩散金属氧化物半导体（DMOS）器件及其制造方法。 DMOS器件包括：第一导电类型衬底，第二导电型高压阱，栅极，第一导电类型体区域，第二导电类型源极，第二导电类型漏极，第一导电型体电极和 第一导电型浮动区域。 浮动区域形成在电气浮动并且与源极和栅极电隔离的体区中，使得减轻静电放电（ESD）效应。

公开(公告)号：US08928078B2

公开(公告)日：2015-01-06

申请号：US13726579

申请日：2012-12-25

申请人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

发明人： Tzu-Cheng Kao ,  Jian-Hsing Lee ,  Jin-Lian Su ,  Huan-Ping Chu ,  Hung-Der Su

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L29/66681 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66689 ,  H01L29/7816 ,  H01L29/7835

摘要： The present invention discloses a double diffused metal oxide semiconductor (DMOS) device and a manufacturing method thereof. The DMOS device includes: a first conductive type substrate, a second conductive type high voltage well, a gate, a first conductive type body region, a second conductive type source, a second conductive type drain, a first conductive type body electrode, and a first conductive type floating region. The floating region is formed in the body region, which is electrically floating and is electrically isolated from the source and the gate, such that the electrostatic discharge (ESD) effect is mitigated.

摘要翻译： 本发明公开了一种双扩散金属氧化物半导体（DMOS）器件及其制造方法。 DMOS器件包括：第一导电类型衬底，第二导电型高压阱，栅极，第一导电类型体区域，第二导电类型源极，第二导电类型漏极，第一导电型体电极和 第一导电型浮动区域。 浮动区域形成在电气浮动并且与源极和栅极电隔离的体区中，使得减轻静电放电（ESD）效应。