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    System and method for submitting and performing computational tasks in a distributed heterogeneous networked environment
    1.
    发明授权
    System and method for submitting and performing computational tasks in a distributed heterogeneous networked environment 有权
    在分布式异构网络环境中提交和执行计算任务的系统和方法

    公开(公告)号：US07395536B2

    公开(公告)日：2008-07-01

    申请号：US10294073

    申请日：2002-11-14

    申请人： Jerome M. Verbeke ,  Neelakanth M. Nadgir ,  Gregory R. Ruetsch ,  Ilya A. Sharapov ,  Michael J. Vernik ,  Vu Trang

    发明人： Jerome M. Verbeke ,  Neelakanth M. Nadgir ,  Gregory R. Ruetsch ,  Ilya A. Sharapov ,  Michael J. Vernik ,  Vu Trang

    IPC分类号： G06F9/46

    CPC分类号： G06F9/5055 ,  G06F9/5072 ,  G06F2209/509 ,  H04L12/185

    摘要： System and method for submitting and performing computational tasks in a distributed heterogeneous networked environment. Embodiments may allow tasks to be submitted and run in parallel on a network of heterogeneous computers implementing a variety of operating environments. In one embodiment, a user on an originating node may advertise code on the network. Peer nodes that respond to the advertisement may receive the code. A job to be executed by the code may be split into separate tasks to distributed to the peer nodes that received the code. These tasks may be advertised on the network. Tasks may be assigned to peer nodes that respond to the task advertisements. The peer nodes may then work on the assigned tasks. Once a peer node's work on a task is completed, the peer node may return the results of the task to the originating node.

    摘要翻译： 在分布式异构网络环境中提交和执行计算任务的系统和方法。 实施例可以允许任务在实现各种操作环境的异构计算机的网络上并行地并行运行。 在一个实施例中，始发节点上的用户可以在网络上通告代码。 响应广告的对等节点可以接收代码。 要由代码执行的作业可以被分割成单独的任务以分发给接收代码的对等节点。 这些任务可以在网络上通告。 可以将任务分配给响应任务广告的对等节点。 然后，对等节点可以在分配的任务上工作。 一旦对等节点对任务的工作完成，对等节点可以将任务的结果返回给始发节点。

    Method and apparatus for creating a robust highly connected direct interconnection network
    2.
    发明授权
    Method and apparatus for creating a robust highly connected direct interconnection network 有权
    用于创建稳健高度连接的直接互连网络的方法和装置

    公开(公告)号：US07333444B1

    公开(公告)日：2008-02-19

    申请号：US10739475

    申请日：2003-12-17

    申请人： Ilya A. Sharapov

    发明人： Ilya A. Sharapov

    IPC分类号： H04L12/28

    CPC分类号： H04L45/00 ,  H04L29/12801 ,  H04L45/14 ,  H04L61/6004

    摘要： One embodiment of the present invention provides a system for generating an interconnection network. During operation, the system associates an n-bit binary identifier with each node in the interconnection network. The system also groups the n bits of each binary identifier into h overlapping sets a1, a2, . . . ah, wherein the sets a1, a2, . . . ah cover all of the n bits. For each set ai, the system forms fully connected clusters of nodes by creating a direct point-to-point link between any two nodes that have binary identifiers that differ in bits of the set a1 but are the same in other bit positions. Note that by varying the amount of overlap and the pattern of overlap between the overlapping sets, a1, a2, . . . ah, the interconnection network can be configured to accommodate different redundancy requirements.

    摘要翻译： 本发明的一个实施例提供一种用于产生互连网络的系统。 在操作期间，系统将n位二进制标识符与互连网络中的每个节点相关联。 系统还将每个二进制标识符的n位分组为h个重叠集合1 ，<2> 。 。 。 一个 ，其中设置一个<1> 2 。 。 。 一个覆盖所有n位。 对于每个集合，系统通过在具有不同于组的位的二进制标识符的任何两个节点之间创建直接点对点链路来形成完全连接的节点集群。，但在其他位位置相同。 请注意，通过改变重叠的重叠量和重叠集合之间的重叠模式，可以通过改变重叠集合之间的重叠量和重叠集合的重叠模式。 。 。 可以将互连网络配置为适应不同的冗余要求。

    Binary code instrumentation to reduce effective memory latency
    4.
    发明授权
    Binary code instrumentation to reduce effective memory latency 有权
    二进制码仪器可以减少有效的内存延迟

    公开(公告)号：US07730470B2

    公开(公告)日：2010-06-01

    申请号：US11362979

    申请日：2006-02-27

    申请人： Ilya A. Sharapov ,  Andrew J. Over

    发明人： Ilya A. Sharapov ,  Andrew J. Over

    IPC分类号： G06F9/45

    CPC分类号： G06F12/0862 ,  G06F2212/601 ,  G06F2212/6028

    摘要： A system for binary code instrumentation to reduce effective memory latency comprises a processor and memory coupled to the processor. The memory comprises program instructions executable by the processor to implement a code analyzer configured to analyze an instruction stream of compiled code executable at an execution engine to identify, for a given memory reference instruction in the stream that references data at a memory address calculated during an execution of the instruction stream, an earliest point in time during the execution at which sufficient data is available at the execution engine to calculate the memory address. The code analyzer generates an indication of whether the given memory reference instruction is suitable for a prefetch operation based on a difference in time between the earliest point in time and a time at which the given memory reference instruction is executed during the execution.

    摘要翻译： 用于减少有效存储器延迟的用于二进制代码检测的系统包括耦合到处理器的处理器和存储器。 存储器包括可由处理器执行的程序指令，以实现代码分析器，该代码分析器被配置为分析在执行引擎处可执行的编译代码的指令流，以针对在该流中的给定存储器参考指令来引用在 指令流的执行，在执行期间的最早的时​​间点，在执行引擎处有足够的数据可用于计算存储器地址。 代码分析器基于最早的时间点与在执行期间执行给定的存储器参考指令的时间之间的时间差来生成给定的存储器参考指令是否适合于预取操作的指示。

    Multi-chip systems with optical bypass
    5.
    发明授权
    Multi-chip systems with optical bypass 有权
    具有光学旁路功能的多芯片系统

    公开(公告)号：US07865084B2

    公开(公告)日：2011-01-04

    申请号：US11853316

    申请日：2007-09-11

    申请人： Ashok V. Krishnamoorthy ,  Ronald Ho ,  Brian W. O'Krafka ,  Ilya A. Sharapov ,  John E. Cunningham

    发明人： Ashok V. Krishnamoorthy ,  Ronald Ho ,  Brian W. O'Krafka ,  Ilya A. Sharapov ,  John E. Cunningham

    IPC分类号： H04B10/00

    CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L25/0652 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Embodiments of a system that includes an array of single-chip modules (CMs) are described. This array includes a first CM, a second CM coupled to the first CM, and a third CM coupled to the second CM. A given CM, which can be the first CM, the second CM or the third CM, includes a semiconductor die that is configured to communicate data signals with other CMs through electromagnetically coupled proximity communication. These proximity connectors are proximate to a surface of the semiconductor die. Moreover, the first CM and the third CM are configured to optically communicate optical signals with each other via the second CM through an optical signal path.

    摘要翻译： 描述了包括单芯片模块（CM）阵列的系统的实施例。 该阵列包括第一CM，耦合到第一CM的第二CM和耦合到第二CM的第三CM。 可以是第一CM，第二CM或第三CM的给定CM包括被配置为通过电磁耦合的邻近通信与其他CM通信数据信号的半导体管芯。 这些接近连接器靠近半导体管芯的表面。 此外，第一CM和第三CM被配置为经由第二CM经由光信号路径彼此光学地传送光信号。

    System and method for unique naming of resources in networked environments
    6.
    发明授权
    System and method for unique naming of resources in networked environments 有权
    在网络环境中独特命名资源的系统和方法

    公开(公告)号：US07533141B2

    公开(公告)日：2009-05-12

    申请号：US10350971

    申请日：2003-01-24

    申请人： Neelakanth M. Nadgir ,  Jerome M. Verbeke ,  Ilya A. Sharapov ,  Gregory R. Ruetsch ,  Vu Trang ,  Michael J. Vernik

    发明人： Neelakanth M. Nadgir ,  Jerome M. Verbeke ,  Ilya A. Sharapov ,  Gregory R. Ruetsch ,  Vu Trang ,  Michael J. Vernik

    IPC分类号： G06F15/16 ,  G06F3/00 ,  H04L12/28

    CPC分类号： G06F9/5072 ,  H04L29/06 ,  H04L63/0281 ,  H04L67/104 ,  H04L67/1044 ,  H04L67/1057 ,  H04L67/1061 ,  H04L67/1093 ,  H04L67/16 ,  H04L69/329

    摘要： System and method for the unique naming of resources in networked environments including peer-to-peer network environments. Embodiments may be used to generate network resource identifiers that uniquely identify resources such as processes over time and across the networked environment. One embodiment may be implemented as a resource name generator that generates unique identifiers for resources in networked environments. One embodiment may generate unique network resource identifiers for processes from information including, but not limited to, a host address that uniquely identifies on the network the host machine of the resource for which the unique network resource identifier is being generated, a current time (e.g. obtained from the host machine or alternatively from an external source such as an atomic time server), and a process identifier of the process that uniquely identifies the process among current processes on the host machine.

    摘要翻译： 用于在网络环境中独特命名资源的系统和方法，包括对等网络环境。 可以使用实施例来生成网络资源标识符，其唯一地标识诸如随时间和跨网络环境的进程的资源。 一个实施例可以实现为资源名称生成器，其在网络环境中生成资源的唯一标识符。 一个实施例可以从包括但不限于在网络上唯一地标识正在生成唯一网络资源标识符的资源的主机的主机地址的信息生成用于进程的唯一网络资源标识符，当前时间（例如， 从主机或从外部源例如原子时间服务器获得的进程的进程标识符，以及在主机上当前进程中唯一地标识进程的进程标识符。

    MULTI-CHIP SYSTEMS WITH OPTICAL BYPASS
    7.
    发明申请
    MULTI-CHIP SYSTEMS WITH OPTICAL BYPASS 有权
    带光学旁路的多芯片系统

    公开(公告)号：US20090067851A1

    公开(公告)日：2009-03-12

    申请号：US11853316

    申请日：2007-09-11

    申请人： Ashok V. Krishnamoorthy ,  Ronald Ho ,  Brian W. O'Krafka ,  Ilya A. Sharapov ,  John E. Cunningham

    发明人： Ashok V. Krishnamoorthy ,  Ronald Ho ,  Brian W. O'Krafka ,  Ilya A. Sharapov ,  John E. Cunningham

    IPC分类号： H04B10/00

    CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L25/0652 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Embodiments of a system that includes an array of single-chip modules (CMs) are described. This array includes a first CM, a second CM coupled to the first CM, and a third CM coupled to the second CM. A given CM, which can be the first CM, the second CM or the third CM, includes a semiconductor die that is configured to communicate data signals with other CMs through electromagnetically coupled proximity communication. These proximity connectors are proximate to a surface of the semiconductor die. Moreover, the first CM and the third CM are configured to optically communicate optical signals with each other via the second CM through an optical signal path.

    摘要翻译： 描述了包括单芯片模块（CM）阵列的系统的实施例。 该阵列包括第一CM，耦合到第一CM的第二CM和耦合到第二CM的第三CM。 可以是第一CM，第二CM或第三CM的给定CM包括被配置为通过电磁耦合的邻近通信与其他CM通信数据信号的半导体管芯。 这些接近连接器靠近半导体管芯的表面。 此外，第一CM和第三CM被配置为经由第二CM经由光信号路径彼此光学地传送光信号。