摘要:
An analog, fully integrated, partial response maximum likelihood (PRML) read channel utilizing a high-performance analog delay line, an analog adaptive equalizer and an analog Viterbi detector is provided, resulting in saved space, performance gains, and lower power consumption. For signal detection and reconstruction used in read operations, the partial response maximum likelihood (PRML) read channel includes a variable gain amplifier coupled to a lowpass filter for input to an adaptive analog equalizer. The adaptive analog equalizer comprises an analog delay line and an analog feedforward equalizer (FFE). An analog Viterbi detector employs maximum-likelihood sequence estimation (MLSE) techniques to performs the signal detection function. A decoder/descrambler produces a final reconstructed signal. The analog implementation of a partial response maximum likelihood (PRML) read channel also includes a scrambler/encoder coupled to a write precompensation circuit for output to a separate write head.
摘要:
Disclosed herein are different embodiments for estimating and/or controlling power consumption in a chip based on hot and cool temperatures in the chip.
摘要:
Methods and systems to detect droop events on-chip, which may include a sensor circuit located adjacent to a voltage node to convert a corresponding voltage to a digital count or value indicative of the voltage. The sensor circuit may include an n-stage ring oscillator and an asynchronous counter. The sensor circuit may include circuitry to capture and convert a phase associated with a count to a binary fractional value to increase voltage resolution. Multiple counts associated with the node may be evaluated at the node to identify minimum and maximum counts and corresponding time stamps. More complex evaluation and control circuitry may be shared amongst a plurality of sensor circuits and may include circuitry to generate and compare counts to one or more variable thresholds, circuitry to average counts over time, and memory to store state values associated with the sensors.
摘要:
A video DAC for driving video displays with reduced power dissipation is presented. This is accomplished using a dual driver circuit connected to a current mirror, the dual driver comprising a strong driver and a weak driver. The dual driver permits switching current between the video load and a dummy load. The current to the dummy load is disabled during periods when the video signal remains steady for a predetermined period of time. The dual driver, using the weak driver, disables the current to the dummy load during video blanking and synchronization periods. This scheme substantially reduces the power dissipation in the DAC.
摘要:
Methods and systems to detect droop events on-chip, which may include a sensor circuit located adjacent to a voltage node to convert a corresponding voltage to a digital count or value indicative of the voltage. The sensor circuit may include an n-stage ring oscillator and an asynchronous counter. The sensor circuit may include circuitry to capture and convert a phase associated with a count to a binary fractional value to increase voltage resolution. Multiple counts associated with the node may be evaluated at the node to identify minimum and maximum counts and corresponding time stamps. More complex evaluation and control circuitry may be shared amongst a plurality of sensor circuits and may include circuitry to generate and compare counts to one or more variable thresholds, circuitry to average counts over time, and memory to store state values associated with the sensors.
摘要:
A method for calibrating a voltage controlled oscillator (VCO) comprising applying a plurality of known voltages to the input of a VCO, monitoring, for each of the voltages, an output count from the VCO over a set interval, and storing the output counts for each voltage. Also disclosed is a system for calibrating a voltage controlled oscillator (VCO) comprising a plurality of known voltages, wherein the known voltage are connectable to the VCO, and a controller coupled to the output of the VCO, wherein the controller maintains a calibration table of VCO output counts for selected voltage inputs.
摘要:
An optical transmitter/receiver pair has an integrated CMOS circuit that provides a current flow to a pre-biased solid state light emitting device (LED) in response to the presence or absence of a digital input signal. The current flow is augmented at the rising and falling edges of the input signal to enhance turn-on and turn-off speed of the LED. The LED is optically coupled to a photodiode that produces a current flow in response to illumination. The photodiode is shielded from spurious electronic noise by a transparent shield and the output of the photodiode is amplified to produce an output voltage, which is connected to a capacitively delayed voltage divider. The voltage divider generates a time delayed threshold voltage connectable along with the output voltage to the inputs of a comparator.