公开(公告)号：US20070109164A1

公开(公告)日：2007-05-17

申请号：US11430285

申请日：2006-05-08

Applicant: Jesus Arias ,  Peter Kiss ,  Johannes Ransijn ,  James Yoder

Inventor： Jesus Arias ,  Peter Kiss ,  Johannes Ransijn ,  James Yoder

IPC: H03M3/00

CPC classification number: H03M3/388 ,  H03M1/0665 ,  H03M3/424 ,  H03M3/464

Abstract: Digital correction of multibit ADAC nonlinearities for error feedback DACs is provided. The integral nonlinearity (INL) error of the multibit ADAC is estimated (on line or off line) by a low-resolution calibration ADC (CADC) and stored in a random-access memory (RAM) table. The INL values are then used to compensate for the ADAC's distortion in the digital domain. When this compensation is combined with mismatch-shaping techniques such as DWA, the resolution requirement for CADC can be relaxed significantly. The implementation of the proposed correction circuit for error-feedback modulators is inherently simple, since the correction only needs a digital summation without any additional digital filtering.

Abstract translation: 提供了用于误差反馈DAC的多位ADAC非线性的数字校正。 通过低分辨率校准ADC（CADC）估计多位ADAC的积分非线性（INL）误差（在线或离线）并存储在随机存取存储器（RAM）表中。 然后，INL值用于补偿ADAC在数字域中的失真。 当这种补偿与DWA等不匹配成形技术相结合时，可以显着放宽CADC的分辨率要求。 所提出的用于误差反馈调制器的修正电路的实现本质上是简单的，因为校正仅需要数字求和而不需要任何额外的数字滤波。

公开(公告)号：US20070003055A1

公开(公告)日：2007-01-04

申请号：US11159614

申请日：2005-06-23

Applicant: Boris Bark ,  Brad Grande ,  Peter Kiss ,  Johannes Ransijn ,  James Yoder

Inventor： Boris Bark ,  Brad Grande ,  Peter Kiss ,  Johannes Ransijn ,  James Yoder

IPC: H04M9/00

CPC classification number: H04M19/001

Abstract: The invention provides a single digital communication link between system-side and line-side circuitry in a DAA, capable both of carrying data signals and of transferring a substantial amount of power to the line-side circuitry. The invention comprises a system-side interface circuit, a line-side interface circuit, and an isolation barrier including a transformer. Each interface circuit is capable of connection to an upstream communication circuit (either line-side or system-side), from which it may receive data signals to be transmitted across the isolation barrier to the other interface circuit, and to which it may pass data signals received across the isolation barrier from the other interface circuit. The line-side interface circuit may further include a rectifier and a storage device.

Abstract translation: 本发明提供了一种在DAA中的系统侧和线路侧电路之间的单个数字通信链路，能够承载数据信号并将大量电力传送到线路侧电路。 本发明包括系统侧接口电路，线路侧接口电路和包括变压器的隔离屏障。 每个接口电路能够连接到上游通信电路（线路侧或系统侧），从而可以接收要跨越隔离屏障传输到另一个接口电路的数据信号，并且其可以传递数据 跨隔离屏障的信号与另一个接口电路接收。 线路侧接口电路还可以包括整流器和存储装置。

公开(公告)号：US20060291545A1

公开(公告)日：2006-12-28

申请号：US11206314

申请日：2005-08-17

Applicant: King-Hon Lau ,  Johannes Ransijn ,  Harold Simmonds ,  James Yoder

Inventor： King-Hon Lau ,  Johannes Ransijn ,  Harold Simmonds ,  James Yoder

IPC: H04L5/16

CPC classification number: H04M3/005 ,  H04L5/1423 ,  H04L25/0266

Abstract: The invention provides a communication protocol and serial interface having an approximately fixed interface clock and capable of accommodating a variety of communication rates. The interface employs a variable-length frame that may be expanded or reduced to obtain a desired communication rate, even though the interface clock rate is held approximately constant. The invention further provides a method for designing an agile barrier interface. In particular, the barrier clock rate is preferably selected to be an approximate common multiple of the various communication rates that the barrier interface must handle. The frame length corresponding to each communication rate may then be obtained by dividing the barrier clock rate by the ΣΔ rate. Finally, the invention provides an agile barrier capable of communicating data across a serial interface at a variety of data rates and at an approximately fixed interface clock rate.

Abstract translation: 本发明提供一种通信协议和串行接口，其具有近似固定的接口时钟并且能够适应各种通信速率。 接口采用可扩展或缩小的可变长度帧，以获得所需的通信速率，即使接口时钟速率保持近似恒定。 本发明还提供了一种用于设计敏捷屏障界面的方法。 特别地，屏障时钟速率优选地被选择为屏障接口必须处理的各种通信速率的近似公倍数。 然后可以通过将屏障时钟速率除以SigmaDelta速率来获得对应于每个通信速率的帧长度。 最后，本发明提供了能够以各种数据速率和大致固定的接口时钟速率通过串行接口传送数据的敏捷障碍。

公开(公告)号：US20080021793A1

公开(公告)日：2008-01-24

申请号：US11832085

申请日：2007-08-01

Applicant: Peter Karas ,  James Cowell ,  James Yoder ,  Matt Golub ,  Aamer Baig

Inventor： Peter Karas ,  James Cowell ,  James Yoder ,  Matt Golub ,  Aamer Baig

IPC: G06F19/00 ,  G06Q90/00

CPC classification number: G07F17/26 ,  G06Q20/02 ,  G06Q20/04 ,  G06Q20/10 ,  G06Q30/02 ,  G06Q30/0226 ,  G06Q30/06 ,  G06Q30/0601 ,  G06Q30/0609 ,  G06Q30/0633 ,  G06Q30/0641

Abstract: According to the invention, a method for creating an electronic greeting card enclosing an electronic gift is disclosed. In one step, the electronic greeting card selection is received from a sender along with a selection of at least one of a type of electronic gift, an amount for the electronic gift, and an identifier for a receiver of the electronic gift. Payment for the electronic gift is received from a money handler chosen by the sender. A code indicative of the electronic gift is received, whereby the code facilitates redemption of the electronic gift. The code is embedded in the electronic greeting card.

Abstract translation: 根据本发明，公开了一种用于创建封闭电子礼物的电子贺卡的方法。 在一个步骤中，从发送者接收电子贺卡选择以及选择电子礼品的类型，电子礼物的金额以及电子礼物的接收者的标识符中的至少一个。 从发件人选择的货币处理方式收到电子礼品的付款。 收到指示电子礼物的代码，其代码便于兑现电子礼物。 该代码嵌入电子贺卡。

公开(公告)号：US20070003054A1

公开(公告)日：2007-01-04

申请号：US11159537

申请日：2005-06-23

Applicant: Johannes Ransijn ,  Boris Bark ,  James Yoder ,  Peter Kiss

Inventor： Johannes Ransijn ,  Boris Bark ,  James Yoder ,  Peter Kiss

IPC: H04M9/00

CPC classification number: H04M3/005 ,  H04M19/001

Abstract: The invention provides a single digital communication link between system-side and line-side circuitry in a DAA, capable both of carrying data signals and of transferring a substantial amount of power to the line-side circuitry. The invention comprises a system-side interface circuit, a line-side interface circuit, and an isolation barrier including a transformer. Each interface circuit is capable of connection to an upstream communication circuit (either line-side or system-side), from which it may receive data signals to be transmitted across the isolation barrier to the other interface circuit, and to which it may pass data signals received across the isolation barrier from the other interface circuit. The line-side interface circuit may further include a rectifier and a storage device.

Abstract translation: 本发明提供了一种在DAA中的系统侧和线路侧电路之间的单个数字通信链路，能够承载数据信号并将大量电力传送到线路侧电路。 本发明包括系统侧接口电路，线路侧接口电路和包括变压器的隔离屏障。 每个接口电路能够连接到上游通信电路（线路侧或系统侧），从而可以接收要跨越隔离屏障传输到另一个接口电路的数据信号，并且其可以传递数据 跨隔离屏障的信号与另一个接口电路接收。 线路侧接口电路还可以包括整流器和存储装置。