公开(公告)号：US09231614B2

公开(公告)日：2016-01-05

申请号：US14298459

申请日：2014-06-06

申请人： ANALOG DEVICES, INC.

发明人： Jose Barreiro Silva ,  Jialin Zhao ,  Wenhua W. Yang

IPC分类号： H03M1/06 ,  H03M3/00

CPC分类号： H03M3/352 ,  H03M3/388 ,  H03M3/416 ,  H03M3/464 ,  H03M3/466

摘要： The present disclosure describes a mechanism to digitally correct for the static mismatch of the digital-to-analog converter (DAC) in at least the first-stage of a multi-stage noise shaping (MASH) analog-to-digital converter (ADC). The correction is applicable to continuous-time implementations, and is especially attractive for high-speed applications.

摘要翻译： 本公开描述了在多级噪声整形（MASH）模数转换器（ADC）的至少第一级数字校正数模转换器（DAC）的静态失配的机制， 。 该校正适用于连续时间实现，对于高速应用特别有吸引力。

公开(公告)号：US20140195225A1

公开(公告)日：2014-07-10

申请号：US14209196

申请日：2014-03-13

申请人： PANASONIC CORPORATION

发明人： Toshihiro TORII ,  Yoshihiro HORII ,  Masashi UCHIDA ,  Junji NAKATSUKA ,  Takaaki SATO

IPC分类号： H03M1/66 ,  G10L19/00

CPC分类号： G10L19/00 ,  H03L7/0891 ,  H03M1/00 ,  H03M1/12 ,  H03M1/66 ,  H03M1/747 ,  H03M1/785 ,  H03M3/388 ,  H03M3/50

摘要： In a DAC device, a distortion correction function g1(x) of a harmonic obtained from a result of a frequency analysis on an analog output signal of a DAC circuit is obtained. A correction value is determined based on the correction function g1(x) in accordance with an input digital signal, and is previously stored in a memory. A nonlinear correction circuit reads a corresponding correction value from the memory in accordance with the value of a digital signal output from a digital filter, and transmits the correction value to a subtractor. The subtractor subtracts the correction value from the digital signal output from the digital filter.

摘要翻译： 在DAC装置中，获得从DAC电路的模拟输出信号的频率分析结果得到的谐波的失真校正函数g1（x）。 校正值根据输入数字信号根据校正函数g1（x）确定，并且预先存储在存储器中。 非线性校正电路根据从数字滤波器输出的数字信号的值从存储器读取对应的校正值，并将校正值发送到减法器。 减法器从数字滤波器输出的数字信号中减去校正值。

公开(公告)号：US07439440B2

公开(公告)日：2008-10-21

申请号：US11236544

申请日：2005-09-28

申请人： Han-Huah Hsu

发明人： Han-Huah Hsu

IPC分类号： G10H1/00 ,  H03F3/38

CPC分类号： H03M3/388 ,  H03M3/506

摘要： An audio player using sigma-delta pulse-width modulation includes a Δ-Σ PWM unit, a drive unit, a speaker unit, and an error prediction unit. The Δ-Σ PWM unit receives an input signal and generates a pulse-width modulation (PWM) signal by means of sigma-delta pulse-width modulation. The drive unit receives the PWM signal and generates a drive signal, and the speaker unit receives the drive signal to produce sound. The error prediction unit receives the PWM signal and generates a predicted feedback signal for the Δ-Σ PWM unit according to stored error data.

摘要翻译： 使用Σ-Δ脉冲宽度调制的音频播放器包括Δ-ΣPWM单元，驱动单元，扬声器单元和错误预测单元。 Delta-Sigma PWM单元接收输入信号，并通过Σ-Δ脉冲宽度调制产生脉宽调制（PWM）信号。 驱动单元接收PWM信号并产生驱动信号，并且扬声器单元接收驱动信号以产生声音。 错误预测单元接收PWM信号，并根据存储的误差数据生成Delta-Sigma PWM单元的预测反馈信号。

公开(公告)号：US20080150773A1

公开(公告)日：2008-06-26

申请号：US12041204

申请日：2008-03-03

申请人： Jesus ARAIS ,  Peter Kiss ,  Johannes G. Ransijn ,  James D. Yoder

发明人： Jesus ARAIS ,  Peter Kiss ,  Johannes G. Ransijn ,  James D. Yoder

IPC分类号： H03M1/10

CPC分类号： H03M3/388 ,  H03M1/0665 ,  H03M3/424 ,  H03M3/464

摘要： Digital correction of multibit ADAC nonlinearities for error feedback DACs is provided. The integral nonlinearity (INL) error of the multibit ADAC is estimated (on line or off line) by a low-resolution calibration ADC (CADC) and stored in a random-access memory (RAM) table. The INL values are then used to compensate for the ADAC's distortion in the digital domain. When this compensation is combined with mismatch-shaping techniques such as DWA, the resolution requirement for CADC can be relaxed significantly. The implementation of the proposed correction circuit for error-feedback modulators is inherently simple, since the correction only needs a digital summation without any additional digital filtering.

摘要翻译： 提供了用于误差反馈DAC的多位ADAC非线性的数字校正。 通过低分辨率校准ADC（CADC）估计多位ADAC的积分非线性（INL）误差（在线或离线）并存储在随机存取存储器（RAM）表中。 然后，INL值用于补偿ADAC在数字域中的失真。 当这种补偿与DWA等不匹配成形技术相结合时，可以显着放宽CADC的分辨率要求。 所提出的用于误差反馈调制器的修正电路的实现本质上是简单的，因为校正仅需要数字求和而不需要任何额外的数字滤波。

公开(公告)号：US07319424B2

公开(公告)日：2008-01-15

申请号：US11344611

申请日：2006-01-31

申请人： Brian Stewart

发明人： Brian Stewart

IPC分类号： H03M1/56

CPC分类号： H03M3/388 ,  H03M3/416

摘要： An internal ADC in a delta-sigma ADC is characterized using inherent delta-sigma ADC circuitry. In one embodiment, a constant DC value is applied as the input signal. The sum of the constant DC value and a feedback signal is integrated. Then, a digital approximation including the integrated sum is generated. The feedback signal is generated and allows ramping of the integrated sum.

摘要翻译： Δ-ΣADC中的内部ADC采用固有的Δ-ΣADC电路进行特征表征。 在一个实施例中，施加恒定DC值作为输入信号。 恒定DC值和反馈信号的总和被积分。 然后，产生包括积分和的数字近似。 产生反馈信号并允许积分和的斜坡。

公开(公告)号：US20060290549A1

公开(公告)日：2006-12-28

申请号：US11477149

申请日：2006-06-27

申请人： Rajiv Laroia ,  Tom Richardson ,  Frank Lane

发明人： Rajiv Laroia ,  Tom Richardson ,  Frank Lane

IPC分类号： H03M3/00

CPC分类号： H03F1/34 ,  H03F3/217 ,  H03M3/388 ,  H03M3/40 ,  H03M7/3006 ,  H03M7/3017 ,  H03M7/3028 ,  H03M7/3031 ,  H03M7/304

摘要： Methods and apparatus for implementing and/or using amplifiers and performing various amplification related operations are described. The methods are well suited for use with, but not limited to, switching type amplifiers. The methods and apparatus described herein allow for the use of switching amplifiers while reducing and/or compensating for distortions that the use of such amplifiers would normally create. The described methods and apparatus can be used alone or in combination with various novel signaling schemes which can make it easier to compensate for the non-ideal behavior of switching amplifiers in such a way as to enable practical application in wireless transmission and/or other applications.

摘要翻译： 描述了用于实现和/或使用放大器并执行各种放大相关操作的方法和装置。 这些方法非常适用于但不限于开关型放大器。 本文描述的方法和装置允许使用开关放大器，同时减少和/或补偿通常使用这种放大器的失真。 所描述的方法和装置可以单独使用或与各种新颖的信令方案组合使用，这可以使得更容易以这样的方式补偿开关放大器的非理想行为，使得无线传输和/或其他应用中的实际应用 。

公开(公告)号：US06795004B2

公开(公告)日：2004-09-21

申请号：US10416443

申请日：2003-05-12

申请人： Toshihiko Masuda ,  Kazunobu Ohkuri

发明人： Toshihiko Masuda ,  Kazunobu Ohkuri

IPC分类号： H03M300

CPC分类号： H03F3/217 ,  H03F2200/331 ,  H03M3/388 ,  H03M3/506 ,  H03M7/3026 ,  H03M7/3031

摘要： A signal amplifier apparatus adapted for carrying out delta-sigma modulation of an input signal to carry out pulse width modulation (PWM) of that signal, to obtain a PWM signal, and to amplify this PWM signal so that a signal of a predetermined magnitude is obtained, wherein the signal amplifier apparatus includes a correction circuit for correcting an output of a quantizer provided in a delta-sigma modulation device. The correction circuit is installed in a feedback path with respect to the input side from the quantizer or immediately before a pulse width modulator to thereby correct distortion taking place in the amplifier. In addition, the signal amplifier apparatus invention compares PWM signals at the input and the output of the amplifier to correct the output of the quantizer that is provided in the delta-sigma modulation device, so as to cancel distortion taking place in the amplifier in accordance with respective rising time difference and falling time difference to thereby correct distortion.

摘要翻译： 一种信号放大器装置，适用于对输入信号进行Δ-Σ调制，以执行该信号的脉宽调制（PWM），获得PWM信号，并放大该PWM信号，使得预定幅度的信号为 其中所述信号放大器装置包括用于校正设置在Δ-Σ调制装置中的量化器的输出的校正电路。 校正电路相对于来自量化器的输入侧或紧接在脉冲宽度调制器之前安装在反馈路径中，从而校正在放大器中发生的失真。 此外，信号放大装置本发明比较放大器的输入和输出端的PWM信号，以校正在Δ-Σ调制装置中提供的量化器的输出，从而根据放大器中发生的失真消除 具有各自的上升时间差和下降时间差，从而校正失真。

公开(公告)号：US06735014B2

公开(公告)日：2004-05-11

申请号：US10220406

申请日：2002-08-30

申请人： Michel Paramythioti

发明人： Michel Paramythioti

IPC分类号： G02B1306

CPC分类号： H03M3/388 ,  G02B13/0095 ,  G02B17/0808 ,  G02B17/0812 ,  G02B17/0852 ,  G02B17/086 ,  H03M3/424

摘要： An aberration-correcting optical relay for an optical system. The relay comprises front and rear converging optical units together with a correcting meniscus or two correcting meniscuses placed symmetrically relative to each other, the meniscus(es) having main faces that are substantially concentric, and preferably exactly concentric, the two converging optical units being placed on a common axis and the correcting meniscus(es) being placed on said axis between the two converging optical units. The front converging optical unit situated upstream from the correcting meniscus(es) is placed in such a manner that the distance from an image point of the portion of the optical system upstream from the optical relay to the front converging optical unit is equal to the focal length of the front converging optical unit, said unit thus transforming a beam coming from said image point into a parallel beam.

摘要翻译： 一种用于光学系统的像差校正光学继电器。 继电器包括前后会聚光学单元以及相对于彼此对称放置的校正弯液面或两个校正半透镜，所述弯月面具有基本同心的主表面，并且优选地精确地同心，所述两个会聚光学单元被放置 并且所述校正弯液面被放置在所述两个会聚光学单元之间的所述轴上。 位于校正弯月面上游的前会聚光学单元被放置成使得从光学继电器上游的光学系统的部分的图像点到前会聚光学单元的距离等于焦点 前端会聚光学单元的长度，所述单元从而将来自所述图像点的光束变换为平行光束。

公开(公告)号：US06271781B1

公开(公告)日：2001-08-07

申请号：US09260228

申请日：1999-03-01

申请人： Leopold Ernest Pellon

发明人： Leopold Ernest Pellon

IPC分类号： H03M166

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/456

摘要： A &Sgr;-&Dgr; analog-to-digital converter (ADC) 210 includes a multibit &Sgr;-&Dgr; modulator 216 and a feedback loop 240, 241 including a digital-to-analog converter (DAC) 241. A nonlinear filter corrector 250 coupled to the multibit output port 216o of the modulator 216 includes a transversal filter 252, weighting multipliers 256 coupled to the taps 254 of the transversal filter 252, and a summing arrangement 258, 260 coupled to the multipliers, for creating a correction signal based on an estimate of the dynamic errors of the &Sgr;-&Dgr; ADC. A calibration arrangement 280 applies an alternating calibration signal to the input port 212 of the &Sgr;-&Dgr; ADC 210, and determines, from the output signal of the modulator 216 and from the known delays L of the delay elements of the transversal filter 252, the values of the weights required to correct dynamic errors of the DAC. In one version, the weighting multipliers are look-up tables.

摘要翻译： SIGMA-DELTA模数转换器（ADC）210包括多位SIGMA-DELTA调制器216和包括数模转换器（DAC）241的反馈环路240,241。耦合到该数字模拟转换器 调制器216的多位输出端口216o包括横向滤波器252，耦合到横向滤波器252的抽头254的加权乘法器256以及耦合到乘法器的求和装置258,260，用于基于估计 SIGMA-DELTA ADC的动态误差。 校准装置280将交替的校准信号施加到SIGMA-DELTA ADC 210的输入端口212，并根据调制器216的输出信号和横向滤波器252的延迟元件的已知延迟L确定 纠正DAC动态误差所需的权重值。 在一个版本中，加权乘法器是查找表。

公开(公告)号：US6020838A

公开(公告)日：2000-02-01

申请号：US186314

申请日：1998-11-04

申请人： Niels Knudsen ,  Mark Whittington

发明人： Niels Knudsen ,  Mark Whittington

IPC分类号： H03M3/02 ,  H03M3/00

CPC分类号： H03M3/388 ,  H03M3/424 ,  H03M3/458

摘要： A system and method for reducing linearity errors in a delta-sigma converter. The linearity errors in the delta-sigma converter are modeled by generating a set of digital signals representative of an inputted sine wave. The set of digital signals are low-pass filtered and subjected to a fast Fourier transform algorithm to generate a frequency domain representation of the sine wave. Thereafter, a net linearity error spectrum is removed from the frequency domain representation and inverse Fourier transform back into the time domain. The filtered set of digital signals are also sorted into subsets of digital signals where each signal in a subset corresponds to a particular output of a delta-sigma modulator contained within the delta-sigma converter. A fast Fourier transform algorithm is applied to each of the filtered subsets of digital signals to generate a frequency domain representation thereof. Specific linearity errors are generated by applying an inverse Fourier transform algorithm to each of the specific linearity error spectrums in the frequency domain representations of the filtered subsets of digital signals. Thereafter, linearity error correction coefficients are generated as a function of the net linearity error and the specific linearity errors. The linearity error correction coefficients are used to generate entries in a look-up table where the entries are adjustable by digital outputs of the delta-sigma modulator. The look-up table is used to correct digital signals outputted by the delta-sigma modulator prior to decimation and digital filter.

摘要翻译： 用于减小Δ-Σ转换器中的线性误差的系统和方法。 Δ-Σ转换器中的线性误差通过产生代表​​输入的正弦波的一组数字信号来建模。 该组数字信号被低通滤波并经受快速傅立叶变换算法以产生正弦波的频域表示。 此后，将净线性误差谱从频域表示和逆傅里叶变换中移除回时域。 经滤波的数字信号组也被分类为数字信号的子集，其中子集中的每个信号对应于包含在Δ-Σ转换器内的Δ-Σ调制器的特定输出。 快速傅立叶变换算法被应用于数字信号的滤波子集中的每一个以产生其频域表示。 通过对经过滤波的数字信号子集的频域表示中的每个特定线性误差谱应用逆傅里叶变换算法来产生特定的线性误差。 此后，产生线性误差校正系数作为净线性误差和特定线性误差的函数。 线性误差校正系数用于在查询表中生成条目，其中条目可由delta-Σ调制器的数字输出调节。 查找表用于在抽取和数字滤波之前校正由Δ-Σ调制器输出的数字信号。