公开(公告)号：US08517124B2

公开(公告)日：2013-08-27

申请号：US12628956

申请日：2009-12-01

申请人： Geir Hareland ,  Jeff Janzen

发明人： Geir Hareland ,  Jeff Janzen

IPC分类号： E21B10/60

CPC分类号： E21B10/62 ,  E21B10/602

摘要： A drill bit is disclosed, comprising: a drill bit head having a cutting face with one or more fixed cutting elements; a flow passage extending from the center towards the gage of the bit which has been designed to increase the velocity across the cutting elements.

摘要翻译： 公开了一种钻头，包括：钻头头，其具有带有一个或多个固定切割元件的切割面; 从中心延伸到钻头规格的流动通道，其被设计成增加穿过切割元件的速度。

公开(公告)号：US07138823B2

公开(公告)日：2006-11-21

申请号：US11040577

申请日：2005-01-20

申请人： Jeff Janzen ,  Wen Li

发明人： Jeff Janzen ,  Wen Li

IPC分类号： H03K17/16

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  H03K19/00323

摘要： An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in response to an ODT control signal. Additionally, the ODTs for a first set of the buffer circuits can be enabled and disabled responsive to the ODT control signal and the ODT for at least one of a second set of the buffer circuits is disabled.

摘要翻译： 提供对输出缓冲器的片上终止（ODT）的独立控制的装置和方法。 输入/输出（I / O）缓冲器的缓冲电路的ODT可以响应于ODT控制信号使能和禁止。 此外，响应于ODT控制信号，可以使得第一组缓冲电路的ODT被使能和禁止，并且禁用第二组缓冲电路中的至少一个的ODT。

公开(公告)号：US20060158214A1

公开(公告)日：2006-07-20

申请号：US11040577

申请日：2005-01-20

申请人： Jeff Janzen ,  Wen Li

发明人： Jeff Janzen ,  Wen Li

IPC分类号： H03K19/003

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  H03K19/00323

摘要： An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in response to an ODT control signal. Additionally, the ODTs for a first set of the buffer circuits can be enabled and disabled responsive to the ODT control signal and the ODT for at least one of a second set of the buffer circuits is disabled.

摘要翻译： 提供对输出缓冲器的片上终止（ODT）的独立控制的装置和方法。 输入/输出（I / O）缓冲器的缓冲电路的ODT可以响应于ODT控制信号使能和禁止。 此外，响应于ODT控制信号，可以使得第一组缓冲电路的ODT被使能和禁止，并且禁用第二组缓冲电路中的至少一个的ODT。

公开(公告)号：US08544567B2

公开(公告)日：2013-10-01

申请号：US12638175

申请日：2009-12-15

申请人： Laurier E. Comeau ,  Geir Hareland ,  Jeff Janzen ,  John Kaminski

发明人： Laurier E. Comeau ,  Geir Hareland ,  Jeff Janzen ,  John Kaminski

IPC分类号： E21B10/38 ,  E21B10/60

CPC分类号： E21B10/602 ,  E21B7/24 ,  E21B10/38 ,  E21B10/60 ,  E21B28/00

摘要： A drill bit comprises: a drill bit head having a cutting face with one or more fixed cutting elements; a flow passage extending through the drill bit head to the cutting face; a flow interrupter within the drill bit head and positioned to interrupt flow of fluid through the flow passage; and a power section connected to drive the flow interrupter and cause, in operation, variable flow of fluid through the flow passage. A method of drilling comprises: flowing fluid through a flow passage extending through a drill bit head to a cutting face of the drill bit head, the cutting face having one or more fixed cutting elements; and driving a flow interrupter within the drill bit head with a power section to interrupt the flow of fluid through the flow passage and cause variable flow of fluid through the flow passage.

摘要翻译： 钻头包括：钻头头，其具有带有一个或多个固定切割元件的切割面; 流动通道，其延伸穿过钻头头到切割面; 钻头头内的流动断流器，其定位成中断流过流动通道的流体; 以及连接以驱动所述流动断流器并且在操作中导致流体流过所述流动通道的可变流动的动力部分。 钻井方法包括：将流体流过延伸穿过钻头头的流动通道到钻头头的切割面，切割面具有一个或多个固定的切割元件; 以及用动力部分在钻头头内驱动一个流动断路器，以中断通过该流动通道的流体流动，并使流体流过该流动通道。

公开(公告)号：US20070040574A1

公开(公告)日：2007-02-22

申请号：US11588473

申请日：2006-10-26

申请人： Jeff Janzen ,  Wen Li

发明人： Jeff Janzen ,  Wen Li

IPC分类号： H03K19/003

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  H03K19/00323

摘要： An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in response to an ODT control signal. Additionally, the ODTs for a first set of the buffer circuits can be enabled and disabled responsive to the ODT control signal and the ODT for at least one of a second set of the buffer circuits is disabled.

摘要翻译： 提供对输出缓冲器的片上终止（ODT）的独立控制的装置和方法。 输入/输出（I / O）缓冲器的缓冲电路的ODT可以响应于ODT控制信号使能和禁止。 此外，响应于ODT控制信号，可以使得第一组缓冲电路的ODT被使能和禁止，并且禁用第二组缓冲电路中的至少一个的ODT。

公开(公告)号：US20070028027A1

公开(公告)日：2007-02-01

申请号：US11190370

申请日：2005-07-26

申请人： Jeff Janzen ,  Jeffrey Wright ,  James Cullum

发明人： Jeff Janzen ,  Jeffrey Wright ,  James Cullum

IPC分类号： G06F12/06 ,  G06F12/00

CPC分类号： G06F13/1684 ,  G11C7/1018 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1072 ,  G11C7/1078 ,  G11C7/1087 ,  G11C8/12 ,  G11C8/18 ,  G11C11/4093 ,  G11C2207/107

摘要： A synchronous dynamic random access memory (“SDRAM”) device includes several banks of memory cell coupled to a read data path and a write data path. The read data path includes a read latch that stores a relatively large number of read data bits received in parallel from a bank of memory cells. Groups of the stored read data bits are sequentially selected by a multiplexer and applied to a read data bus. Groups of write data bits are sequentially coupled to the SDRAM device through a write data bus that is separate from the read data bus, and they are sequentially stored in input registers. When the input registers are full, the write data bits are coupled in parallel to a bank of memory cells. The number of bits in the write data bus is preferably a submultiple of the number of bits in the read data bus.

摘要翻译： 同步动态随机存取存储器（“SDRAM”）器件包括耦合到读取数据路径和写入数据路径的若干存储单元组。 读数据路径包括读存储器，其存储从一组存储器单元并行接收的相对大量的读数据位。 存储的读取数据位的组由多路复用器依次选择并应用于读取数据总线。 写数据位组通过与读数据总线分离的写数据总线顺序地耦合到SDRAM器件，并且它们被依次存储在输入寄存器中。 当输入寄存器满时，写数据位并联耦合到一组存储单元。 写数据总线中的比特数优选地是读数据总线中的比特数的数量。

公开(公告)号：US20110000716A1

公开(公告)日：2011-01-06

申请号：US12638175

申请日：2009-12-15

申请人： Laurier E. Comeau ,  Geir Hareland ,  Jeff Janzen ,  John Kaminski

发明人： Laurier E. Comeau ,  Geir Hareland ,  Jeff Janzen ,  John Kaminski

IPC分类号： E21B10/60 ,  E21B10/42 ,  E21B7/00

CPC分类号： E21B10/602 ,  E21B7/24 ,  E21B10/38 ,  E21B10/60 ,  E21B28/00

摘要： A drill bit is disclosed, comprising: a drill bit head having a cutting face with one or more fixed cutting elements; a flow passage extending through the drill bit head to the cutting face; a flow interrupter within the drill bit head and positioned to interrupt flow of fluid through the flow passage; and a power section connected to drive the flow interrupter and cause, in operation, variable flow of fluid through the flow passage. A method of drilling is also disclosed comprising: flowing fluid through a flow passage extending through a drill bit head to a cutting face of the drill bit head, the cutting face having one or more fixed cutting elements; and driving a flow interrupter within the drill bit head with a power section to interrupt the flow of fluid through the flow passage and cause variable flow of fluid through the flow passage.

摘要翻译： 公开了一种钻头，包括：钻头头，其具有带有一个或多个固定切割元件的切割面; 流动通道，其延伸穿过钻头头到切割面; 钻头头内的流动断流器，其定位成中断流过流动通道的流体; 以及连接以驱动所述流动断流器并且在操作中导致流体流过所述流动通道的可变流动的动力部分。 还公开了一种钻孔方法，包括：使流体流过延伸穿过钻头头的流动通道到钻头头的切割面，切割面具有一个或多个固定切割元件; 以及用动力部分在钻头头内驱动一个流动断路器，以中断通过该流动通道的流体流动，并使流体流过该流动通道。

公开(公告)号：US07285979B2

公开(公告)日：2007-10-23

申请号：US11588473

申请日：2006-10-26

申请人： Jeff Janzen ,  Wen Li

发明人： Jeff Janzen ,  Wen Li

IPC分类号： H03K17/16

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  H03K19/00323

摘要： An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in response to an ODT control signal. Additionally, the ODTs for a first set of the buffer circuits can be enabled and disabled responsive to the ODT control signal and the ODT for at least one of a second set of the buffer circuits is disabled.

公开(公告)号：US20070140315A1

公开(公告)日：2007-06-21

申请号：US11303680

申请日：2005-12-16

申请人： Jeff Janzen ,  Jeffrey Wright ,  Todd Farrell

发明人： Jeff Janzen ,  Jeffrey Wright ,  Todd Farrell

IPC分类号： G01K7/00

CPC分类号： G01K7/00 ,  G01K2219/00

摘要： A circuit and method for providing temperature data indicative of a temperature measured by a temperature sensor. The circuit is coupled to the temperature sensor and configured to identify for a coarse temperature range one of a plurality of fine temperature ranges corresponding to the temperature measured by the temperature sensor and generate temperature data that is provided on an asynchronous output data path.

摘要翻译： 一种用于提供表示由温度传感器测量的温度的温度数据的电路和方法。 电路耦合到温度传感器并且被配置为识别对应于由温度传感器测量的温度的多个精细温度范围之一的粗略温度范围，并且生成提供在异步输出数据路径上的温度数据。

公开(公告)号：US20050027959A1

公开(公告)日：2005-02-03

申请号：US10930444

申请日：2004-08-31

申请人： Paul LaBerge ,  Jeff Janzen

发明人： Paul LaBerge ,  Jeff Janzen

IPC分类号： G06F12/00 ,  G06F13/42

CPC分类号： G06F13/4243

摘要： A method of selecting CAS latencies in a system. Specifically, a system which includes a plurality of memory devices and a memory controller is provided. Because different memory devices may have different CAS latencies, a system CAS latency is selected wherein the system CAS latency is the fastest common CAS latency of each of the plurality of memory devices. After a read request is delivered to a memory device, the memory controller initiates a transmission flag to the memory device at a time equal to the system CAS latency, indicating that it is safe to transmit the requested data from the memory device to the memory controller. The transmission flags may be used in conjunction with mode registers such that one or both of the transmission flag and the data may be received by or delivered by a corresponding memory device.