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    Process for fabricating trench isolation structure for integrated circuits
    3.
    发明授权
    Process for fabricating trench isolation structure for integrated circuits 有权
    用于集成电路制造沟槽隔离结构的工艺

    公开(公告)号：US6110797A

    公开(公告)日：2000-08-29

    申请号：US455105

    申请日：1999-12-06

    申请人： Jeff Perry ,  Albert Bergemont

    发明人： Jeff Perry ,  Albert Bergemont

    IPC分类号： H01L21/762 ,  H01L21/76

    CPC分类号： H01L21/76224 ,  H01L21/76232

    摘要： A trench isolation structure featuring a shallow trench overlying a deep trench is fabricated avoiding creation of irregularities on the deep trench sidewalls. Such sidewall irregularities are conventionally associated with interaction between etchant and unexposed positive photoresist formed at the bottom of the deep trench during prior shallow trench photolithography steps. In one embodiment of the present invention, a deep trench is created and then a positive photoresist mask is patterned. The positive photoresist mask is utilized to etch a barrier selective to underlying single crystal silicon in anticipated shallow trench regions. Once the barrier has been removed, the positive photoresist mask is stripped, removing any unexposed positive photoresist remaining within the deep trench. Single crystal silicon revealed by removal of the barrier is etched to create the shallow trench, with remaining barrier material sacrificed to protect the underlying surface against this etching. In an alternative embodiment, a negative photoresist mask is employed during shallow trench photolithography, with development of the negative photoresist effective to remove the photoresist from the deep trench.

    摘要翻译： 制造了具有覆盖在深沟槽上的浅沟槽的沟槽隔离结构，以避免在深沟槽侧壁上产生凹凸。 这种侧壁凹凸通常与在先前的浅沟槽光刻步骤期间在深沟槽的底部形成的蚀刻剂和未曝光的正光致抗蚀剂之间的相互作用相关。 在本发明的一个实施例中，产生深沟槽，然后对正性光致抗蚀剂掩模进行图案化。 正光致抗蚀剂掩模用于蚀刻对预期的浅沟槽区域中的下面的单晶硅的选择性的屏障。 一旦去除了屏障，就剥去正光致抗蚀剂掩模，去除留在深沟槽内的任何未曝光的正光致抗蚀剂。 通过去除屏障而显露的单晶硅被蚀刻以产生浅沟槽，牺牲了剩余的阻挡材料以保护下面的表面免受该蚀刻。 在替代实施例中，在浅沟槽光刻期间采用负光致抗蚀剂掩模，负光致抗蚀剂的显影有效地从深沟槽去除光致抗蚀剂。