公开(公告)号：US08735239B2

公开(公告)日：2014-05-27

申请号：US13197133

申请日：2011-08-03

申请人： Sangjine Park ,  Young Suk Jung ,  Boun Yoon ,  Jeongman Han ,  Byung-Kwon Cho

发明人： Sangjine Park ,  Young Suk Jung ,  Boun Yoon ,  Jeongman Han ,  Byung-Kwon Cho

IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L27/10 ,  H01L29/80

CPC分类号： H01L21/823814 ,  H01L21/02068 ,  H01L21/31116 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/41775 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

摘要： Provided is a method of fabricating a semiconductor device. Gate patterns are formed on a substrate including an NMOS transistor region and a PMOS transistor region. A spacer structure is formed on sidewalls of the gate patterns. The substrate in the PMOS transistor region is etched using the gate patterns and the spacer structure as etching masks, and thereby a recessed region is formed. A compressive stress pattern is formed in the recessed region, and a sidewall of the compressive stress pattern protrudes upwardly from an upper surface of the substrate. A mask oxide layer is formed on a sidewall of the spacer structure. The mask oxide layer is formed to cover a portion of the sidewall of the compressive stress pattern that protrudes upwardly from the upper surface of the substrate.

摘要翻译： 提供一种制造半导体器件的方法。 栅极图案形成在包括NMOS晶体管区域和PMOS晶体管区域的衬底上。 间隔结构形成在栅极图案的侧壁上。 使用栅极图案和间隔结构作为蚀刻掩模蚀刻PMOS晶体管区域中的衬底，从而形成凹陷区域。 在凹陷区域中形成压缩应力图案，压缩应力图案的侧壁从基板的上表面向上突出。 在间隔结构的侧壁上形成掩模氧化物层。 掩模氧化物层被形成为覆盖从衬底的上表面向上突出的压缩应力图案的侧壁的一部分。

公开(公告)号：US20120094459A1

公开(公告)日：2012-04-19

申请号：US13197133

申请日：2011-08-03

申请人： Sanjine Park ,  Young Suk Jung ,  Boun Yoon ,  Jeongman Han ,  Byung-Kwon Cho

发明人： Sanjine Park ,  Young Suk Jung ,  Boun Yoon ,  Jeongman Han ,  Byung-Kwon Cho

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L21/823814 ,  H01L21/02068 ,  H01L21/31116 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/41775 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

摘要： Provided is a method of fabricating a semiconductor device. Gate patterns are formed on a substrate including an NMOS transistor region and a PMOS transistor region. A spacer structure is formed on sidewalls of the gate patterns. The substrate in the PMOS transistor region is etched using the gate patterns and the spacer structure as etching masks, and thereby a recessed region is formed. A compressive stress pattern is formed in the recessed region, and a sidewall of the compressive stress pattern protrudes upwardly from an upper surface of the substrate. A mask oxide layer is formed on a sidewall of the spacer structure. The mask oxide layer is formed to cover a portion of the sidewall of the compressive stress pattern that protrudes upwardly from the upper surface of the substrate.

摘要翻译： 提供一种制造半导体器件的方法。 栅极图案形成在包括NMOS晶体管区域和PMOS晶体管区域的衬底上。 间隔结构形成在栅极图案的侧壁上。 使用栅极图案和间隔结构作为蚀刻掩模蚀刻PMOS晶体管区域中的衬底，从而形成凹陷区域。 在凹陷区域中形成压缩应力图案，压缩应力图案的侧壁从基板的上表面向上突出。 在间隔结构的侧壁上形成掩模氧化物层。 掩模氧化物层被形成为覆盖从衬底的上表面向上突出的压缩应力图案的侧壁的一部分。