Abstract:
A data transition minimization method includes exclusive-NORing inputted nth image data (where n is a natural number) and (n−m)th image data (where m is a natural number smaller than n) expressing the same color as that of the nth image data to generate transition information data; generating inversion data indicative of inversion information by inverting all bits included in the transition information data and adding a unit bit having the logic value ‘1’ to the inverted transition information data when the number of unit bits having a logic value ‘1’ in the transition information data is larger than the number of unit bits having a logic value ‘0’ in the transition information data, and adding a unit bit having the logic value ‘0’ to the transition information data when the number of unit bits having the logic value ‘1’ in the transition information data is equal to or smaller than the number of unit bits having the logic value ‘0’ in the transition information data; exclusive-NORing the transition information data with the inversion data added and corrected image data of (n−1)th image data to generate corrected image data of the nth image data, and supplying the generated corrected image data to a data driver through data transmission lines; and restoring the corrected image data supplied to the data driver to restored image data corresponding to the original nth image data.
Abstract:
A liquid crystal display device includes a first transistor that outputs a charge share voltage to a data line in response to a first output control signal. A second transistor outputs a pre-charge voltage, which is greater than the charge share voltage, to the data line in response to a second output control signal which is delayed in phase from the first output control signal. A third transistor outputs a data voltage to the data line in response to at least one of the first and second output control signals. A logic circuit controls the transistors in response to the output control signals and a polarity control signal that controls the polarity of the data voltage.
Abstract:
An array substrate for a liquid crystal display device includes a substrate including a display area and a non-display area, the non-display area having a link area and a pad area, array elements in the display area on the substrate, first to nth pads in the pad area (n is a natural number), first to nth link lines in the link area and connected to the first to nth pads, respectively, wherein the first to (n/2−1)th link lines are symmetrical with the nth to (n/2+1)th link lines with respect to (n/2)th link line, the first to (n/2−1)th link lines have inclined portions, and the inclined portions of the first to kth link lines have decreasing widths and decreasing lengths toward the kth link line from the first link line, wherein k is larger than 1 and smaller than (n/2).
Abstract:
A display having a data driving integrated circuit includes N number of output channels (where N is an integer) having at least two regions including a first output channel and an Nth output channel, a data output channel group including M data output channels (where M is an integer less than N), the M data output channels supplying pixel data to a corresponding number of the data lines in accordance with a desired resolution of the display, wherein (N−M) output channels are not supplied with pixel data, and the (N−M) output channels are located between the first output channel and the Nth output channel, and a channel selector selecting the M data output channels.
Abstract:
Disclosed herein are a liquid crystal display device which is capable of maintaining the level of a common voltage applied to a common electrode constant, and a method for driving the same. The liquid crystal display device includes a liquid crystal panel including a plurality of pixel rows for displaying an image, a plurality of pixel cells arranged in each of the pixel rows, a common electrode provided in common in the pixel cells, a common voltage correction unit that obtains predominant-polarity data based on polarities of image data to be supplied to the pixel cells arranged in an nth one of the pixel rows, obtains predominant-polarity data based on polarities of image data to be supplied to the pixel cells arranged in an (n+1)th one of the pixel rows adjacent to the nth pixel row, obtains a sum of the two predominant-polarity data, and selects and outputting any one of a plurality of predetermined correction values based on the sum, and a common voltage output unit that corrects a common voltage based on the correction value from the common voltage correction unit and supplies the corrected common voltage to the common electrode.
Abstract:
A tape carrier package (TCP) includes a film, a plurality of output leads and a plurality of input leads on the film, the plurality of output leads and the plurality of input leads being disposed on different sides, first and second TCP alignment marks arranged on opposing sides of the plurality of output leads, and a third TCP alignment mark at a central portion of the plurality of output leads.
Abstract:
A liquid crystal display (LCD) device and a driving method thereof for improving a working efficiency of the LCD and reducing manufacturing costs. The liquid crystal display device includes a liquid crystal display panel having liquid crystal cells at crossings of data lines and gate lines, data integrated circuit supplying pixel data via a plurality of data output channels, a gate integrated circuit driving the gate lines, a channel selector for selecting the plurality of data output channels of the data integrated circuits in accordance with a number of the data lines wherein only the selected data output channels contain the pixel data, and a timing controller for controlling the data integrated circuit and the gate integrated circuit.
Abstract:
An apparatus and method for data interface of a flat panel display device, which is capable of transferring clocks in a state, in which the clocks are embedded in digital data, thereby reducing the number of transfer lines, is disclosed. The apparatus includes a transmitter unit built in a timing controller, to transmit transfer data with an embedding clock embedded between successive pieces of data, and a clock enable signal to indicate the embedding clock, and receiver units respectively built in a plurality of data integrated circuits connected to the timing controller, to separate and detect the embedding clock and the data from the transfer data, in response to the clock enable signal.
Abstract:
A liquid crystal display for changing a supply sequence of a scanning pulse with which a plurality of gate lines are supplied to realize a one dot inversion, and a driving method thereof are disclosed.In the liquid crystal display, a liquid crystal display panel has a plurality of data lines and a plurality of gate lines, which are crossed each other, and pixels, which are defined by the lines. A gate driver supplies scanning pulses to the gate lines, and changes a supply sequence of the scanning pulses for each frame. A data driver converts digital video data into data voltages and periodically inverts a polarity of the data voltages to supply the data voltages in accordance with a supply sequence of the scanning pulses. And a timing controller supplies the digital video data to the data driver, and controls the data driver and the gate driver, and wherein a polarity of data voltages, which are supplied to the liquid crystal display panel, is inverted for each liquid crystal cell and a polarity of a data voltage which is outputted from the data driver, is inverted for every two to four horizontal periods.
Abstract:
A liquid crystal display device is set forth that comprises a data line that is connected to drive a liquid crystal cell and an output driver connected to selectively provide a pixel drive signal to the data line. The pixel drive signal corresponds to a digital video data signal provided to the liquid crystal display device. A pre-charging circuit is used to reduce the power consumed by the output driver. To this end, the pre-charging circuit is connected to selectively pre-charge the data line to one or more of a plurality of voltage levels depending on the value of the digital video data signal. In one embodiment, the plurality of voltage levels comprises a positive pre-charge voltage, a negative pre-charge voltage, and a charge share voltage. The magnitudes of the positive pre-charge voltage and the negative pre-charge voltage may be chosen so that they are greater than the magnitude of the charge share voltage.