公开(公告)号：US07266039B2

公开(公告)日：2007-09-04

申请号：US11178169

申请日：2005-07-08

申请人： Ju-An Chiang

发明人： Ju-An Chiang

IPC分类号： G11C8/18 ,  G11C8/00

CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C29/02 ,  G11C29/023 ,  G11C29/028 ,  G11C29/50012

摘要： A circuit for adjusting a signal length is adapted for a memory device. The circuit adjusts a signal length of an ATD signal. The circuit includes a timing module, an encoding module and a logical control unit. Wherein, the timing module generates a plurality of timing signals according a pulse generated by the ATD signal. The encoding module is coupled to one of the data lines of the memory device. The timing signals are registered and encoded to generate a time value according to the status of the data output from the memory device. In addition, the logic control unit compares the present time value and the previous time value to generate a comparison result. The signal length of the ATD signal is adjusted according to the comparison result.

摘要翻译： 用于调整信号长度的电路适用于存储器件。 电路调整ATD信号的信号长度。 该电路包括定时模块，编码模块和逻辑控制单元。 其中，定时模块根据由ATD信号产生的脉冲产生多个定时信号。 编码模块耦合到存储器件的数据线之一。 定时信号被登记和编码，以根据从存储器件输出的数据的状态产生时间值。 此外，逻辑控制单元将当前时间值与先前时间值进行比较以生成比较结果。 根据比较结果调整ATD信号的信号长度。

公开(公告)号：US20070008792A1

公开(公告)日：2007-01-11

申请号：US11178169

申请日：2005-07-08

申请人： Ju-An Chiang

发明人： Ju-An Chiang

IPC分类号： G11C7/00 ,  G11C8/00 ,  G11C8/18 ,  G11C7/10

CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C29/02 ,  G11C29/023 ,  G11C29/028 ,  G11C29/50012

摘要： A circuit for adjusting a signal length is adapted for a memory device. The circuit adjusts a signal length of an ATD signal. The circuit includes a timing module, an encoding module and a logical control unit. Wherein, the timing module generates a plurality of timing signals according a pulse generated by the ATD signal. The encoding module is coupled to one of the data lines of the memory device. The timing signals are registered and encoded to generate a time value according to the status of the data output from the memory device. In addition, the logic control unit compares the present time value and the previous time value to generate a comparison result. The signal length of the ATD signal is adjusted according to the comparison result.

公开(公告)号：US20140021935A1

公开(公告)日：2014-01-23

申请号：US13553329

申请日：2012-07-19

申请人： CHUN-HSIUNG HUNG ,  JU-AN CHIANG

发明人： CHUN-HSIUNG HUNG ,  JU-AN CHIANG

IPC分类号： G05F3/16

CPC分类号： G05F1/56

摘要： The present invention relates to an apparatus of bandgap buffer which comprising a voltage processing module to produce a bandgap buffer voltage in response to an input voltage and a feedback signal and a symmetry circuit coupled to the voltage processing module for producing the feedback signal and regulating the feedback signal in response to the input voltage.

摘要翻译： 本发明涉及一种带隙缓冲器的装置，其包括电压处理模块，用于响应于输入电压产生带隙缓冲电压，反馈信号和耦合到电压处理模块的对称电路产生反馈信号并调节 响应于输入电压的反馈信号。

公开(公告)号：US20130027116A1

公开(公告)日：2013-01-31

申请号：US13194039

申请日：2011-07-29

申请人： Ju-An Chiang ,  Hsing-Wen Chang

发明人： Ju-An Chiang ,  Hsing-Wen Chang

IPC分类号： H01L37/00

CPC分类号： G05F3/30 ,  H01L27/0248

摘要： A temperature compensation circuit, applied on a metal oxide semiconductor (MOS) transistor, with a threshold voltage varying with respect to a temperature value of the MOS transistor, for having the MOS transistor corresponding to an equivalent threshold voltage substantially with a constant value throughout a temperature range, comprises a voltage generator. The voltage generator provides a voltage proportional to absolute temperature (VPTAT) to drive the body of the MOS transistor in such way that a variation of the threshold voltage due to temperature variation of the MOS transistor is substantially compensated with a variation of the threshold voltage due to body-source voltage variation of the MOS transistor, so that the MOS transistor corresponds to the equivalent threshold voltage that is temperature invariant.

摘要翻译： 一种温度补偿电路，其施加在金属氧化物半导体（MOS）晶体管上，阈值电压相对于MOS晶体管的温度值而变化，以使MOS晶体管对应于基本上具有恒定值的等效阈值电压 温度范围包括电压发生器。 电压发生器提供与绝对温度（VPTAT）成比例的电压，以驱动MOS晶体管的主体，使得由于MOS晶体管的温度变化导致的阈值电压的变化基本上被阈值电压的变化补偿 到MOS晶体管的体源电压变化，使得MOS晶体管对应于温度不变的等效阈值电压。

公开(公告)号：US09018933B2

公开(公告)日：2015-04-28

申请号：US13553329

申请日：2012-07-19

申请人： Chun-Hsiung Hung ,  Ju-An Chiang

发明人： Chun-Hsiung Hung ,  Ju-An Chiang

IPC分类号： G05F3/16 ,  G05F1/56

CPC分类号： G05F1/56

摘要： The present invention relates to a voltage bandgap buffer apparatus. This apparatus includes a voltage processing module to produce a bandgap buffer voltage in response to an input voltage and a feedback signal and a symmetry circuit. This symmetry circuit is coupled to the voltage processing module for producing the feedback signal and for regulating the feedback signal in response to the input voltage.

摘要翻译： 本发明涉及电压带隙缓冲装置。 该装置包括电压处理模块，用于响应于输入电压和反馈信号和对称电路产生带隙缓冲器电压。 该对称电路耦合到电压处理模块，用于产生反馈信号并响应于输入电压调节反馈信号。

公开(公告)号：US08547166B2

公开(公告)日：2013-10-01

申请号：US13194039

申请日：2011-07-29

申请人： Ju-An Chiang ,  Hsing-Wen Chang

发明人： Ju-An Chiang ,  Hsing-Wen Chang

IPC分类号： G05F1/10

CPC分类号： G05F3/30 ,  H01L27/0248

摘要： A temperature compensation circuit, applied on a metal oxide semiconductor (MOS) transistor, with a threshold voltage varying with respect to a temperature value of the MOS transistor, for having the MOS transistor corresponding to an equivalent threshold voltage substantially with a constant value throughout a temperature range, comprises a voltage generator. The voltage generator provides a voltage proportional to absolute temperature (VPTAT) to drive the body of the MOS transistor in such way that a variation of the threshold voltage due to temperature variation of the MOS transistor is substantially compensated with a variation of the threshold voltage due to body-source voltage variation of the MOS transistor, so that the MOS transistor corresponds to the equivalent threshold voltage that is temperature invariant.

摘要翻译： 一种温度补偿电路，其施加在金属氧化物半导体（MOS）晶体管上，阈值电压相对于MOS晶体管的温度值而变化，以使MOS晶体管对应于基本上具有恒定值的等效阈值电压 温度范围包括电压发生器。 电压发生器提供与绝对温度（VPTAT）成比例的电压，以驱动MOS晶体管的主体，使得由于MOS晶体管的温度变化导致的阈值电压的变化基本上被阈值电压的变化补偿 到MOS晶体管的体源电压变化，使得MOS晶体管对应于温度不变的等效阈值电压。

公开(公告)号：US20120091980A1

公开(公告)日：2012-04-19

申请号：US12906661

申请日：2010-10-18

申请人： Ju-An Chiang

发明人： Ju-An Chiang

IPC分类号： G05F1/10

CPC分类号： H03K5/00 ,  G11C7/02 ,  G11C7/12 ,  G11C16/24

摘要： A voltage driving circuit comprises a current bias generating unit and a voltage driving unit. The current bias generating unit is configured to receive a mode signal and to generate a mode selection current in response to the mode signal. The voltage driving unit is coupled to the current bias generating unit, and is configured to receive the mode selection current and to drive an output voltage at a slew rate that is set according to the mode selection current. The voltage driving unit can include a plurality of stages, where each stage is configured to drive the output voltage at a respective different slew rate according to the mode signal.

摘要翻译： 电压驱动电路包括电流偏置发生单元和电压驱动单元。 电流偏置产生单元被配置为接收模式信号并且响应于模式信号而产生模式选择电流。 电压驱动单元耦合到电流偏置产生单元，并且被配置为接收模式选择电流并且以根据模式选择电流设置的压摆率驱动输出电压。 电压驱动单元可以包括多个级，其中每个级被配置为根据模式信号以相应的不同的转换速率来驱动输出电压。

公开(公告)号：US08498158B2

公开(公告)日：2013-07-30

申请号：US12906661

申请日：2010-10-18

申请人： Ju-An Chiang

发明人： Ju-An Chiang

IPC分类号： G11C16/04

CPC分类号： H03K5/00 ,  G11C7/02 ,  G11C7/12 ,  G11C16/24

摘要： A voltage driving circuit comprises a current bias generating unit and a voltage driving unit. The current bias generating unit is configured to receive a mode signal and to generate a mode selection current in response to the mode signal. The voltage driving unit is coupled to the current bias generating unit, and is configured to receive the mode selection current and to drive an output voltage at a slew rate that is set according to the mode selection current. The voltage driving unit can include a plurality of stages, where each stage is configured to drive the output voltage at a respective different slew rate according to the mode signal.

摘要翻译： 电压驱动电路包括电流偏置发生单元和电压驱动单元。 电流偏置产生单元被配置为接收模式信号并且响应于模式信号而产生模式选择电流。 电压驱动单元耦合到电流偏置生成单元，并且被配置为接收模式选择电流并且以根据模式选择电流设置的压摆率驱动输出电压。 电压驱动单元可以包括多个级，其中每个级被配置为根据模式信号以相应的不同的转换速率来驱动输出电压。