公开(公告)号：US06519265B1

公开(公告)日：2003-02-11

申请号：US09322632

申请日：1999-05-28

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： G06F1334

CPC分类号： H04L12/40058 ,  G06F9/461 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9063

摘要： A system and method for context switching in an electronic network comprises a memory configured to store instruction modules, each instruction module corresponding to a context, a processor that executes the instruction modules, and a control state machine. The control state machine selects one of the instruction modules for execution by the processor according to context information from the electronic network. The control state machine includes a switch address generator, a return address register, and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address register stores a return address, which is an address of a next consecutive instruction, when an instruction module is interrupted for a context switch. The program counter select outputs the switch address, the return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的上下文切换的系统和方法包括：存储器，被配置为存储指令模块，每个指令模块对应于上下文，执行指令模块的处理器和控制状态机。 控制状态机根据来自电子网络的上下文信息来选择处理器执行的指令模块之一。 控制状态机包括开关地址发生器，返回地址寄存器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址寄存器当指令模块被中断以进行上下文切换时，存储作为下一个连续指令的地址的返回地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。

公开(公告)号：US20100046685A1

公开(公告)日：2010-02-25

申请号：US12194673

申请日：2008-08-20

申请人： Jung-Jen Liu

发明人： Jung-Jen Liu

IPC分类号： H04L7/06

CPC分类号： H04L27/2656 ,  H04L27/2659 ,  H04L27/2662 ,  H04L27/2675 ,  H04L27/2678

摘要： A method and system for reducing power consumption of OFDM (Orthogonal Frequency Division Multiplexing) signal synchronization circuit comprises a sync setting, a sync controller, a sync pipeline and a data corrector. The sync setting dynamically changes correlation data sample rate based on synchronization statuses and results. The sync controller controls and schedules frame and symbol synchronizations, and turns on and off the sync pipeline based on synchronization activities. The sync pipeline integrates frame and symbol synchronization operations, synchronizes receiving signal with scalable synchronization window, synchronization sequence length, synchronization delay and variable data sample rate. Data corrector adjusts input data with coarse timing and fine frequency offsets estimated in sync pipeline, and generates corrected output data for further processing. By using the above techniques, the power consumption of signal synchronization circuit is reduced.

摘要翻译： 用于降低OFDM（正交频分复用）信号同步电路的功耗的方法和系统包括同步设置，同步控制器，同步线路和数据校正器。 同步设置基于同步状态和结果动态地改变相关数据采样率。 同步控制器控制和调度帧和符号同步，并基于同步活动打开和关闭同步流水线。 同步流水线集成了帧和符号同步操作，将接收信号与可伸缩同步窗口同步，同步序列长度，同步延迟和可变数据采样率。 数据校正器以同步流水线估计的粗定时和精细频率偏移来调整输入数据，并生成校正输出数据进行进一步处理。 通过使用上述技术，信号同步电路的功耗降低。

公开(公告)号：US20100016768A1

公开(公告)日：2010-01-21

申请号：US12470497

申请日：2009-05-22

申请人： Jung-Jen Liu

发明人： Jung-Jen Liu

IPC分类号： A61H1/00 ,  A61H7/00 ,  A61H15/00

CPC分类号： A61H23/0254 ,  A61H7/002 ,  A61H2015/0064 ,  A61H2201/1638 ,  A61H2201/1642 ,  A61H2201/165 ,  A61H2201/1671 ,  A61H2201/1692 ,  A61H2205/06 ,  A61H2205/10

摘要： A vibrating and rolling massage device is wearable on a limb of a user in order to allow the user to carry out massage operation with rolling of the massage device and to provide massage effect simultaneously on the limb wearing the massage device and a part of a human body on which the palm wearing the massage device is positioned. Further, a vibration motor that generates vibration for carrying out massage operation is provided in such a way that the vibration motor is accommodated in a motor holder that can be releasably mounted/dismounted in a tool free manner so that the vibration motor can be selectively set at a position desired by the user.

摘要翻译： 振动和滚动的按摩装置可佩戴在使用者的肢体上，以便允许使用者按摩按摩装置进行按摩操作，同时对穿着按摩装置和人的一部分的肢体提供按摩效果 佩戴按摩装置的手掌位于其上的身体。 此外，产生用于进行按摩操作的振动的振动马达设置成使得振动马达容纳在能够以无工具方式可拆卸地安装/拆卸的马达保持器中，使得可以选择性地设置振动马达 在用户期望的位置。

公开(公告)号：US06169745A

公开(公告)日：2001-01-02

申请号：US09336064

申请日：1999-06-18

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： G06F1334

CPC分类号： H04L12/40058 ,  G06F9/3806 ,  G06F9/4486

摘要： A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch. The program counter select outputs a switch address, a return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的多级上下文切换的系统和方法，包括配置成实现数据优先方案的控制状态机，被配置为根据数据优先级方案保存和释放中断的指令模块的返回地址的返回地址发生器，以及 来自电子网络的上下文信息，以及被配置为根据数据优先级方案和上下文信息来处理来自电子网络的数据的处理器。 接收寄存器存储从电子网络接收的数据。 控制状态机包括切换地址发生器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址生成器保存并释放当上下文切换中断指令模块时的返回地址，后者是下一个连续指令的地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。

公开(公告)号：US06523108B1

公开(公告)日：2003-02-18

申请号：US09448568

申请日：1999-11-23

申请人： David James ,  Jung-Jen Liu

发明人： David James ,  Jung-Jen Liu

IPC分类号： G06F9315

CPC分类号： G06F9/30029 ,  G06F9/30032

摘要： Deposit and extract instructions include an opcode, a source address, a destination address, a shift number, and a K-bit mask string. The opcode describes the operations to be performed upon a J-bit source string and an N-bit destination string. The source address points to the memory location of the J-bit source string. The destination address points to the memory location of the N-bit destination string. The shift number indicates the number of bits the J-bit source string is to be shifted to generate a shifted bit string. The combination of the shifted bit string with the N-bit destination string is conducted under the control of the K-bit mask string. The invention is useful for high speed digital data processing, such as that performed by devices operating under the IEEE 1394 protocol.

摘要翻译： 存储和提取指令包括操作码，源地址，目的地址，移位号和K位掩码字符串。 操作码描述了要在J位源字符串和N位目的字符串上执行的操作。 源地址指向J位源字符串的存储位置。 目标地址指向N位目的地字符串的存储单元。 移位数表示J位源字符串要移位以产生移位的位串的位数。 移位的位串与N位目的地串的组合在K位掩码串的控制下进行。 本发明对于诸如由根据IEEE 1394协议操作的设备执行的高速数字数据处理是有用的。

公开(公告)号：US6167471A

公开(公告)日：2000-12-26

申请号：US172994

申请日：1998-10-14

申请人： Jung-Jen Liu ,  Bruce A. Fairman

发明人： Jung-Jen Liu ,  Bruce A. Fairman

IPC分类号： G06F13/12 ,  H04L12/28 ,  H04L12/56 ,  G06F13/10 ,  G06F9/30 ,  G11C8/00 ,  H04J3/26

CPC分类号： H04L49/90

摘要： An apparatus for dispatching a processing element to a program location based on a channel number of received data includes a channel pointer register having a number of storage locations each with a channel number field, a valid bit field and a corresponding instruction pointer field. When an isochronous channel is allocated for use for reception, the host device programs the channel number and a corresponding instruction pointer value into a storage location. When a storage location is programmed, a valid bit within that storage location is also preferably set. The corresponding instruction pointer value points to a series of instructions which are to be used to process data received on that isochronous channel. When isochronous data is then received, the channel number on which the data is received is compared to the channel numbers within the valid storage locations in the channel pointer register. If one of the channel numbers within a valid storage location matches the channel number of the received data, then the corresponding instruction pointer value is output and the data is processed according to a series of instructions beginning at the location specified by the corresponding instruction pointer value. Otherwise, if the channel number of the received data does not match any of the channel numbers within valid storage locations then a default instruction pointer value is output and the received data is processed according to a series of instructions beginning at the location specified by the default instruction pointer value.

摘要翻译： 一种用于基于接收数据的频道号将处理元件分配到节目位置的装置包括具有多个存储位置的频道指针寄存器，每个存储位置具有频道号字段，有效位字段和相应的指令指针字段。 当同步信道被分配用于接收时，主机设备将信道号和相应的指令指针值编程到存储位置。 当存储位置被编程时，也优选地设置该存储位置内的有效位。 相应的指令指针值指向要用于处理在同步信道上接收的数据的一系列指令。 当接收到等时数据时，将接收数据的通道号与通道指针寄存器中的有效存储位置内的通道号进行比较。 如果有效存储位置中的一个通道号与接收到的数据的通道号匹配，则输出相应的指令指针值，并根据从相应指令指针值指定的位置开始的一系列指令来处理数据 。 否则，如果接收到的数据的通道号与有效存储位置内的任何通道号不匹配，则输出默认指令指针值，并根据从默认值指定的位置开始的一系列指令来处理接收到的数据 指令指针值。

公开(公告)号：US08363635B2

公开(公告)日：2013-01-29

申请号：US12194673

申请日：2008-08-20

申请人： Jung-Jen Liu

发明人： Jung-Jen Liu

IPC分类号： H04J3/06

CPC分类号： H04L27/2656 ,  H04L27/2659 ,  H04L27/2662 ,  H04L27/2675 ,  H04L27/2678

摘要： A method and system for reducing power consumption of OFDM (Orthogonal Frequency Division Multiplexing) signal synchronization circuit comprises a sync setting, a sync controller, a sync pipeline and a data corrector. The sync setting dynamically changes correlation data sample rate based on synchronization statuses and results. The sync controller controls and schedules frame and symbol synchronizations, and turns on and off the sync pipeline based on synchronization activities. The sync pipeline integrates frame and symbol synchronization operations, synchronizes receiving signal with scalable synchronization window, synchronization sequence length, synchronization delay and variable data sample rate. Data corrector adjusts input data with coarse timing and fine frequency offsets estimated in sync pipeline, and generates corrected output data for further processing. By using the above techniques, the power consumption of signal synchronization circuit is reduced.

摘要翻译： 用于降低OFDM（正交频分复用）信号同步电路的功耗的方法和系统包括同步设置，同步控制器，同步线路和数据校正器。 同步设置基于同步状态和结果动态地改变相关数据采样率。 同步控制器控制和调度帧和符号同步，并基于同步活动打开和关闭同步流水线。 同步流水线集成了帧和符号同步操作，将接收信号与可伸缩同步窗口同步，同步序列长度，同步延迟和可变数据采样率。 数据校正器以同步流水线估计的粗定时和精细频率偏移来调整输入数据，并生成校正输出数据进行进一步处理。 通过使用上述技术，信号同步电路的功耗降低。

公开(公告)号：USD604859S1

公开(公告)日：2009-11-24

申请号：US29338990

申请日：2009-06-23

申请人： Jung-Jen Liu

设计人： Jung-Jen Liu

公开(公告)号：US06757760B1

公开(公告)日：2004-06-29

申请号：US09670508

申请日：2000-09-26

申请人： Jung-Jen Liu ,  Bruce A. Fairman

发明人： Jung-Jen Liu ,  Bruce A. Fairman

IPC分类号： G06F1310

CPC分类号： H04L49/90

摘要： A dispatching apparatus includes a channel pointer register having storage locations, each with fields for channel number, valid bit, and corresponding instruction pointer which points to instructions for processing data for that channel. When an isochronous channel is allocated for reception, the host programs the channel number and corresponding instruction pointer value into a storage location and sets the corresponding valid bit. When data is received, the channel number is compared to channel numbers within valid storage locations. The data is processed according to instructions located at the corresponding instruction pointer value if there is a channel number match or instructions at the default instruction pointer value if there is no match. Default instructions include broadcasting data received on one channel to appropriate channels, multicasting data, handling errors and exceptions, ignoring a channel, routing data to another channel, monitoring active channels on the bus, and other actions for processing data.

摘要翻译： 调度装置包括具有存储位置的信道指针寄存器，每个具有用于通道号，有效位和对应指令指针的字段，其指向用于处理该通道的数据的指令。 当同步信道被分配用于接收时，主机将信道号和相应的指令指针值编程到存储位置并设置相应的有效位。 当接收到数据时，将通道号与有效存储位置中的通道号进行比较。 如果存在通道号匹配，或者如果没有匹配，则以默认指令指针值指令，根据位于相应指令指针值的指令来处理数据。 默认指令包括在一个通道上接收的广播数据到适当的信道，多播数据，处理错误和异常，忽略信道，将数据路由到另一信道，监视总线上的活动信道以及处理数据的其他动作。

公开(公告)号：US06667988B1

公开(公告)日：2003-12-23

申请号：US09638659

申请日：2000-08-14

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： H04L1266

CPC分类号： H04L12/40058 ,  G06F9/3806 ,  G06F9/4486

摘要： A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch. The program counter select outputs a switch address, a return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的多级上下文切换的系统和方法，包括配置成实现数据优先方案的控制状态机，被配置为根据数据优先级方案保存和释放中断的指令模块的返回地址的返回地址发生器，以及 来自电子网络的上下文信息，以及被配置为根据数据优先级方案和上下文信息来处理来自电子网络的数据的处理器。 接收寄存器存储从电子网络接收的数据。 控制状态机包括开关地址发生器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址生成器保存并释放当上下文切换中断指令模块时的返回地址，后者是下一个连续指令的地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。