公开(公告)号：US20060072369A1

公开(公告)日：2006-04-06

申请号：US10960950

申请日：2004-10-12

申请人： Richard Madter ,  Karin Werder ,  Wei Yao Huang

发明人： Richard Madter ,  Karin Werder ,  Wei Yao Huang

IPC分类号： G11C8/02

CPC分类号： G11C5/141 ,  G06F12/0804 ,  G06F2212/2022 ,  G11C7/20 ,  G11C11/4072 ,  G11C11/4074 ,  G11C16/0483 ,  G11C16/30 ,  Y02D10/13

摘要： A system and method for automatically saving the contents of volatile memory in a data processing device on power failure. A secondary power supply is provided, which upon failure of the primary power supply supplies power long enough for all modified information stored in volatile memory to be written to a non-volatile memory device such as NAND flash in an AutoSave procedure. In the preferred embodiment modified sectors in volatile memory are flagged, and only modified sectors with a directory list are written to non-volatile memory during the AutoSave procedure.

公开(公告)号：US20050185472A1

公开(公告)日：2005-08-25

申请号：US11051491

申请日：2005-02-04

申请人： Jerrold Randell ,  Richard Madter ,  Karin Werder

发明人： Jerrold Randell ,  Richard Madter ,  Karin Werder

IPC分类号： G06F9/44 ,  G06F12/02 ,  G06F12/08 ,  G06F12/16 ,  G11C16/04

CPC分类号： G06F12/0893 ,  G06F11/1068 ,  G06F11/1441 ,  G06F11/2015 ,  G06F12/0638 ,  G06F12/1441 ,  G06F21/79 ,  G06F2212/2022

摘要： A memory interface controller and method to allow a processor designed and configured to operate with NOR flash and SRAM memory devices to instead operate using NAND flash and SDRAM. The system accomplishes this by caching sectors out of NAND flash into SDRAM, where the data can be randomly accessed by the processor as though it were accessing data from NOR flash/SRAM. Sectors containing data required by the processor are read out of NAND flash and written into SDRAM, where the data can be randomly accessed by the processor.

摘要翻译： 一种存储器接口控制器和方法，其允许处理器设计和配置为与NOR闪存和SRAM存储器件一起操作，以代替使用NAND闪存和SDRAM进行操作。 该系统通过将NAND闪存中的扇区缓存到SDRAM中来实现，其中数据可以被处理器随机访问，就像它正在从NOR闪存/ SRAM访问数据一样。 包含处理器所需数据的扇区从NAND闪存中读出并写入SDRAM，数据可由处理器随机访问。

公开(公告)号：US08347025B2

公开(公告)日：2013-01-01

申请号：US13302524

申请日：2011-11-22

申请人： Jerrold Richard Randell ,  Richard C. Madter ,  Karin Werder

发明人： Jerrold Richard Randell ,  Richard C. Madter ,  Karin Werder

IPC分类号： G06F13/14

CPC分类号： G06F12/0893 ,  G06F11/1068 ,  G06F11/1441 ,  G06F11/2015 ,  G06F12/0638 ,  G06F12/1441 ,  G06F21/79 ,  G06F2212/2022

摘要： A memory controller interface, mobile device and method are provided. The memory controller interface can allow a processor designed and configured to operate with NOR flash and static random access memory SRAM devices to instead operate using NAND flash and synchronous dynamic random access memory SDRAM. The system accomplishes this by caching sectors out of NAND flash into SDRAM, where the data can be randomly accessed by the processor as though it were accessing data from NOR flash/SRAM. Sectors containing data required by the processor are read out of NAND flash and written into SDRAM, where the data can be randomly accessed by the processor. Boot code is stored in memory accessible to the processor and is read out of the memory for execution. The boot code is scanned for a predetermined signature, and if the predetermined signature is found, a portion of the memory is write-protected.

摘要翻译： 提供了存储器控制器接口，移动设备和方法。 存储器控制器接口可以允许设计和配置的处理器与NOR闪存和静态随机存取存储器SRAM器件进行操作，而不是使用NAND闪存和同步动态随机存取存储器SDRAM进行操作。 该系统通过将NAND闪存中的扇区缓存到SDRAM中来实现，其中数据可以被处理器随机访问，就像它正在从NOR闪存/ SRAM访问数据。 包含处理器所需数据的扇区从NAND闪存中读出并写入SDRAM，数据可由处理器随机访问。 引导代码存储在处理器可访问的存储器中，并从存储器中读出以执行。 扫描引导代码以进行预定的签名，并且如果找到预定的签名，则存储器的一部分被写保护。