公开(公告)号：US3940288A

公开(公告)日：1976-02-24

申请号：US468876

申请日：1974-05-10

申请人： Mikio Takagi ,  Hajime Kamioka ,  Kazufumi Nakayama ,  Haruo Shimoda

发明人： Mikio Takagi ,  Hajime Kamioka ,  Kazufumi Nakayama ,  Haruo Shimoda

IPC分类号： H01L21/00 ,  H01L21/033 ,  H01L21/225 ,  H01L23/485 ,  H01L29/00 ,  H01L21/265

CPC分类号： H01L23/485 ,  H01L21/00 ,  H01L21/033 ,  H01L21/2257 ,  H01L29/00 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10S148/111 ,  Y10S148/124 ,  Y10S148/141 ,  Y10S148/143 ,  Y10S148/145

摘要： A method of making a semiconductor device capable of high-speed operation is disclosed in which when the current gain-bandwidth is increased by the formation of a shallow base region. A side etching process is used to decrease the base spreading resistance and to allow ease in the formation of an emitter region of fine pattern. When the emitter region is formed by using polycrystalline silicon as a source of impurity diffusion, that area of an insulating film on a semiconductor substrate which adjoins the polycrystalline silicon is removed before the impurity diffusion so as to prevent an abnormal diffusion phenomenon.BACKGROUND OF THE INVENTION

摘要翻译： 公开了一种制造能够高速运行的半导体器件的方法，其中当通过形成浅的基极区域增加电流增益带宽时。 使用侧蚀刻工艺来降低基极扩散电阻并且容易形成精细图案的发射极区域。 当通过使用多晶硅作为杂质扩散源形成发射极区域时，在杂质扩散之前去除邻接多晶硅的半导体衬底上的绝缘膜的面积，以防止异常扩散现象。