公开(公告)号：US10999214B2

公开(公告)日：2021-05-04

申请号：US15925741

申请日：2018-03-19

申请人： Donald Kevin Cameron

发明人： Donald Kevin Cameron

IPC分类号： H04L12/911 ,  G06F9/24 ,  G06F9/30 ,  G06F9/48 ,  G06F9/50 ,  G06F9/54 ,  G06F12/0802 ,  H04L29/08 ,  H04L29/06

摘要： A method, apparatus and system for a secure memory with restricted access by processors. System has a plurality of processor units (PUs) coupled to a block of memory with at least one section secured (BMSS) against hacking by not allowing all PUs to access BMSS. One or more PUs has access to BMSS and is implemented with a dedicated function(s) that no other PU can perform such as a security function for encryption key checks. A thread running on a given PU that lacks access to a given memory location in BMSS is transferred to another PU with i) access to given memory location in BMSS; ii) implemented dedicated function; and/or iii) locked down instruction memory not free to run other code. Any attempt to breach protocol issues a fault. Existing code is hardened against less secure user code by only permitting authorized routines to transfer to the implemented PU.

公开(公告)号：US08370705B1

公开(公告)日：2013-02-05

申请号：US12565169

申请日：2009-09-23

申请人： Shu-Yi Yu ,  Kevin Cameron

发明人： Shu-Yi Yu ,  Kevin Cameron

IPC分类号： H03M13/00 ,  G11C29/00

CPC分类号： H03M13/09

摘要： One or more embodiments of the invention set forth techniques to perform integer division using addition operations in order to provide address translation capabilities to a processor. The processor supports a memory that maintains checksum information such that address requests received by the processor need to be translated to a checksum address and an actual data address that accounts for use of portions of the memory to store checksum information. Once the checksum address and the actual data address are computed, the processor can confirm the integrity of the data stored in the actual data address and correct any errors if need be, based on the checksum information stored in the checksum address.

摘要翻译： 本发明的一个或多个实施例提出了使用加法运算执行整数除法以便向处理器提供地址转换能力的技术。 处理器支持维持校验和信息的存储器，使得由处理器接收的地址请求需要被转换成校验和地址和实际的数据地址，该数据地址用于存储部分存储器以存储校验和信息。 一旦计算了校验和地址和实际数据地址，则处理器可以基于存储在校验和地址中的校验和信息来确认存储在实际数据地址中的数据的完整性，并根据需要校正任何错误。

公开(公告)号：US07948987B2

公开(公告)日：2011-05-24

申请号：US12830728

申请日：2010-07-06

申请人： Kevin Cameron ,  Gurumurthy v. s. Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

发明人： Kevin Cameron ,  Gurumurthy v. s. Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

IPC分类号： H04L12/56

CPC分类号： H04L49/3009 ,  H04L49/201 ,  H04L49/254 ,  H04L49/3036 ,  H04L49/3072 ,  H04L49/352 ,  H04L49/508

摘要： A method of adjusting fields of a datagram in the handling of the datagram in a network device may comprising receiving a datagram, with the datagram having at least module identifier fields and port identifier fields, at a port of a network device, adding or subtracting an offset value to at least one of the module identifier fields and at least one of the port identifier fields of the datagram based on data registers in the network device, and forwarding the datagram to a legacy device based on the module and port identifier fields of the datagram. A size of each of the module identifier fields and the port identifier fields handled by the legacy device may be smaller than a size of the module identifier fields and port identifier fields handled by the network device.

摘要翻译： 在网络设备中处理数据报中调整数据报的字段的方法可以包括在网络设备的端口处接收数据报，数据报至少具有模块标识符字段和端口标识符字段，添加或减去 基于所述网络设备中的数据寄存器，将所述数据报的至少一个模块标识符字段和所述端口标识符字段中的至少一个的偏移值，并且基于所述模块标识符字段的模块和端口标识符字段将所述数据报转发到传统设备 数据报 由遗留设备处理的每个模块标识符字段和端口标识符字段的大小可以小于由网络设备处理的模块标识符字段和端口标识符字段的大小。

公开(公告)号：US07778245B2

公开(公告)日：2010-08-17

申请号：US10985031

申请日：2004-11-10

申请人： Kevin Cameron ,  Gurumurthy V. S. Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

发明人： Kevin Cameron ,  Gurumurthy V. S. Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

IPC分类号： H04L12/56

CPC分类号： H04L49/3009 ,  H04L49/201 ,  H04L49/254 ,  H04L49/3036 ,  H04L49/3072 ,  H04L49/352 ,  H04L49/508

摘要： A method of adjusting fields of a datagram in the handling of the datagram in a network device is disclosed. The method includes receiving a datagram, with the datagram having at least module identifier fields and port identifier fields, at a port of a network device, determining whether the received datagram is a unicast datagram, adjusting the module and port identifier fields of the datagram based on data registers in the network device when the received datagram is a unicast datagram and forwarding the datagram based on the module and port identifier fields of the datagram. The port of the network device is connected to a legacy device, where the legacy device has a reduced handling capacity when compared to the network device.

摘要翻译： 公开了一种在网络设备中处理数据报中调整数据报字段的方法。 该方法包括在网络设备的端口处接收具有数据报至少具有模块标识符字段和端口标识符字段的数据报，确定所接收的数据报是单播数据报，调整数据报的模块和端口标识符字段 当接收的数据报是单播数据报时，在网络设备中的数据寄存器上，并且基于数据报的模块和端口标识符字段来转发数据报。 网络设备的端口连接到传统设备，其中传统设备与网络设备相比具有降低的处理能力。

公开(公告)号：US20150256484A1

公开(公告)日：2015-09-10

申请号：US14412672

申请日：2013-08-19

申请人： Donald Kevin CAMERON

发明人： Donald Kevin Cameron

IPC分类号： H04L12/911 ,  H04L29/06 ,  H04L29/08

CPC分类号： H04L47/788 ,  G06F9/24 ,  G06F9/30 ,  G06F9/3004 ,  G06F9/4856 ,  G06F9/5033 ,  G06F9/547 ,  G06F12/0802 ,  G06F2209/509 ,  H04L67/10 ,  H04L67/1002 ,  H04L67/40

摘要： In an embodiment, a processing resource allocation method is disclosed. The method may include identifying an instruction mapped to data having a preselected data location. The method may also include determining whether to transfer a call of the instruction from a first processing unit (PU) to a second PU based on the preselected data location.

摘要翻译： 在一个实施例中，公开了一种处理资源分配方法。 该方法可以包括识别映射到具有预选数据位置的数据的指令。 该方法还可以包括基于预先选择的数据位置来确定是否将来自第一处理单元（PU）的指令的调用传送到第二PU。

公开(公告)号：US08734171B2

公开(公告)日：2014-05-27

申请号：US13441894

申请日：2012-04-08

申请人： D Kevin Cameron

发明人： D Kevin Cameron

IPC分类号： H01R27/00

CPC分类号： H01R29/00

摘要： A method and apparatus for modifying standard AC plugs and receptacles to flexibly furnish AC or DC power is disclosed. This can be accomplished by adding a “selector” pin between the non-ground pins used in traditional AC plugs. Alternately, an interposer can be manually applied to the plug to effect selection. Plug electronics can select AC or DC based on respective availability. A flexible power receptacle can manage AC/DC selection, regulate the supplied DC voltage and enable reversion to the AC supply if the DC supply is inadequate. Electronics within a flexible power receptacle can convert DC to AC when advantageous and can regulate the supplied voltage. Additional electronics within a flexible power plug or receptacle can enable communication.

摘要翻译： 公开了用于修改标准AC插头和插座以灵活地提供AC或DC电力的方法和装置。 这可以通过在传统交流电源插头中使用的非接地引脚之间添加“选择器”引脚来实现。 或者，可以将插入件手动地施加到插头上以进行选择。 插头电子设备可以根据相应的可用性选择交流或直流。 灵活的电源插座可以管理AC / DC选择，调节所提供的直流电压，并且如果直流电源不足，则可以对交流电源进行逆变。 柔性电源插座内的电子器件在有利的情况下可将DC转换成AC，并可调节供电电压。 灵活的电源插头或插座内的附加电子装置可实现通讯。

公开(公告)号：US20060013214A1

公开(公告)日：2006-01-19

申请号：US10985031

申请日：2004-11-10

申请人： Kevin Cameron ,  Gurumurthy Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

发明人： Kevin Cameron ,  Gurumurthy Yeleswarapu ,  Mohan Kalkunte ,  Srinivas Sampath ,  Brian Baird

IPC分类号： H04L12/28

CPC分类号： H04L49/3009 ,  H04L49/201 ,  H04L49/254 ,  H04L49/3036 ,  H04L49/3072 ,  H04L49/352 ,  H04L49/508

摘要： A method of adjusting fields of a datagram in the handling of the datagram in a network device is disclosed. The method includes receiving a datagram, with the datagram having at least module identifier fields and port identifier fields, at a port of a network device, determining whether the received datagram is a unicast datagram, adjusting the module and port identifier fields of the datagram based on data registers in the network device when the received datagram is a unicast datagram and forwarding the datagram based on the module and port identifier fields of the datagram. The port of the network device is connected to a legacy device, where the legacy device has a reduced handling capacity when compared to the network device.

摘要翻译： 公开了一种在网络设备中处理数据报中调整数据报字段的方法。 该方法包括在网络设备的端口处接收具有数据报至少具有模块标识符字段和端口标识符字段的数据报，确定所接收的数据报是单播数据报，调整数据报的模块和端口标识符字段 当接收的数据报是单播数据报时，在网络设备中的数据寄存器上，并且基于数据报的模块和端口标识符字段来转发数据报。 网络设备的端口连接到传统设备，其中传统设备与网络设备相比具有降低的处理能力。

公开(公告)号：US20230336198A1

公开(公告)日：2023-10-19

申请号：US18135735

申请日：2023-04-17

申请人： D KEVIN CAMERON

发明人： D KEVIN CAMERON

IPC分类号： H04B1/10

CPC分类号： H04B1/10

摘要： A system, method, and apparatus for serializer/deserializer (SERDES) communication. In one embodiment, power consumption is reduced by tuning links individually for best speed and/or bit error rate (BER) through use of one or more of i) low-level link management; ii) avoiding multiplexing of channels where it impacts performance, and iii) enabling peer-to-peer (p2p) communications in ostensibly master/servant scenarios. Fine tuning of link behavior is achieved with one or more techniques including i) analog-artificial intelligence (AI) methods, rather than traditional adaptive/digital signal processing (DSP) filtering; ii) efficient power level setting; and iii) feed-forward control.

公开(公告)号：US20230334213A1

公开(公告)日：2023-10-19

申请号：US18135732

申请日：2023-04-17

申请人： D KEVIN CAMERON

发明人： D KEVIN CAMERON

IPC分类号： G06F30/38 ,  G06F30/367

CPC分类号： G06F30/38 ,  G06F30/367

摘要： A system, method, and apparatus for analog/mixed-signal defect simulation and analysis methodology. Block-level behavioral models simulated at transistor level, using automated or manual techniques, are binned for all the possible defects that have similar results. A likelihood of a given block-level behavioral model is determined from the likelihood of the defects it represents. Deliberate binning in another embodiment is based on one or more functions of the given block being simulated, e.g., by amplifier gain for an analog amplifier, or by speed/power for a digital part. One or more bins are ‘defect-free behavior’ that cover nominal and corner behavior (power & timing), from manufacturing variability, which may be labeled as “failed” or “degraded” depending on specific performances. For standard parts, test-benches provide the binning from the block-level behavioral models as a result.

公开(公告)号：US09438029B2

公开(公告)日：2016-09-06

申请号：US14341738

申请日：2014-07-25

申请人： D Kevin Cameron

发明人： D Kevin Cameron

IPC分类号： H02M7/758 ,  H02M7/797 ,  H02H7/122 ,  H02J5/00 ,  H02J3/00 ,  H02M7/539

CPC分类号： H02H7/1222 ,  H02J3/00 ,  H02J5/00 ,  H02M7/539 ,  Y10T307/406

摘要： A system, method, and apparatus is disclosed for interfacing and transferring power unidirectionally or bidirectionally between a direct current (DC) line and a single or multiphase alternating-current (AC) line for only half of any given phase and only a single phase at a time when polarity is matched between the DC and the AC system. A circuit with simplified, robust, and reduced-cost components perform the power conditioning and the synchronization as a system that simulates a half-wave rectifier/inverter.

摘要翻译： 公开了一种系统，方法和装置，用于在直流（DC）线路和单相或多相交流（AC）线路之间单向或双向接地和传输功率，仅用于任何给定相位的一半，并且仅在 在DC和AC系统之间极性匹配的时间。 具有简化，稳健和降低成本的组件的电路执行功率调节和同步，作为模拟半波整流器/逆变器的系统。