Integrated circuit bonding method and apparatus
    1.
    发明授权
    Integrated circuit bonding method and apparatus 有权
    集成电路接合方法及装置

    公开(公告)号:US6074897A

    公开(公告)日:2000-06-13

    申请号:US238706

    申请日:1999-01-28

    摘要: A technique for enabling sufficient flow of flux cleaning fluids and an underfill material in the relatively low-profile gap between a flip-chip bonded IC chip and a substrate, such as a printed circuit board, is to provide at least one aperture in the substrate under the IC chip. The use of such an aperture enables, for example, flux cleaning fluid to flow through the aperture into the low-profile gap between the IC chip and the substrate surface, such as by the application of pressure or by gravity, which then exits through openings between formed interconnect bonds at a sufficient flow rate to adequately remove flux residues. An epoxy underfill to the IC chip can be formed in a similar manner. For example, a relatively thick bead of epoxy, such as on the order of the thickness of the IC chip, is deposited or stencil printed on the substrate surface around the edges of the IC chip and capillary action is then relied upon to draw the epoxy into the low-profile gap. Undesirable air pockets which otherwise would develop form the displaced air as the epoxy flows into the low-profile gap can advantageously escape through the aperture of the invention.

    摘要翻译: 在倒装芯片接合IC芯片和诸如印刷电路板的基板之间的相对较小的间隙中使助焊剂清洁流体和底部填充材料足够流动的技术是在基板中提供至少一个孔 在IC芯片下。 使用这种孔可以使例如助焊剂清洁流体通过孔径流入IC芯片和衬底表面之间的薄型间隙,例如通过施加压力或重力,然后压力或重力通过开口 在形成的互连键之间以足够的流速充分去除焊剂残余物。 可以以类似的方式形成到IC芯片的环氧树脂底部填充。 例如,相对较厚的环氧树脂珠,例如IC芯片厚度的顺序,沉积或模板印刷在IC芯片边缘周围的基板表面上,然后依靠毛细作用来绘制环氧树脂 进入低调的差距。 当环氧树脂流入低轮廓间隙时,否则会发展形成排出空气的不良气囊可以有利地通过本发明的孔逃逸。

    Power and ground and signal layout for higher density integrated circuit
connections with flip-chip bonding
    2.
    发明授权
    Power and ground and signal layout for higher density integrated circuit connections with flip-chip bonding 有权
    用于具有倒装芯片接合的高密度集成电路连接的电源和接地和信号布局

    公开(公告)号:US6140710A

    公开(公告)日:2000-10-31

    申请号:US305732

    申请日:1999-05-05

    摘要: An integrated circuit package including a die housing an integrated circuit and having a plurality of electrical contact pads on a surface of the die. The electrical contact pads include energizing contact pads for connecting power and ground lines to the integrated circuit, and include data contact pads. The energizing contact pads lie along the path of intersecting first and second directional lines. The intersecting directional lines define four quadrants on the surface of the die, each quadrant containing at least one data contact pad.

    摘要翻译: 一种集成电路封装,其包括具有集成电路的管芯,并且在所述管芯的表面上具有多个电接触焊盘。 电接触焊盘包括用于将电源和接地线连接到集成电路的激励接触焊盘,并且包括数据接触焊盘。 激励接触垫沿着相交的第一和第二方向线的路径。 相交的方向线在芯片的表面上限定四个象限,每个象限包含至少一个数据接触焊盘。

    Semiconductor package with high density I/O lead connection
    3.
    再颁专利
    Semiconductor package with high density I/O lead connection 失效
    具有高密度I / O引线连接的半导体封装

    公开(公告)号:USRE36894E

    公开(公告)日:2000-10-03

    申请号:US229857

    申请日:1994-04-19

    摘要: Disclosed is a semiconductor package which permits coupling of semiconductor bond pads to I/O leads where a high density of connections is needed. Conductive fingers backed by an insulating tape are bonded to the ends of the ringers on a lead frame. The tape fingers are electrically coupled to the bond pads on one major surface of the semiconductor chip by wire bonding. In one embodiment, the opposite major surface of the chip is bonded to a paddle on the lead frame through an aperture in the tape for maximum heat dissipation.

    摘要翻译: 公开了一种半导体封装,其允许将半导体接合焊盘耦合到需要高密度连接的I / O引线。 由绝缘带支撑的导电指状物在引线框架上结合到振铃器的端部。 带状指状物通过引线接合电耦合到半导体芯片的一个主表面上的接合焊盘。 在一个实施例中,芯片的相对的主表面通过带中的孔结合到引线框架上的桨,用于最大的散热。