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    Token passing scheme for multithreaded multiprocessor system
    4.
    发明申请
    Token passing scheme for multithreaded multiprocessor system 审中-公开
    多线程多处理器系统的令牌传递方案

    公开(公告)号：US20070156928A1

    公开(公告)日：2007-07-05

    申请号：US11322818

    申请日：2005-12-30

    申请人： Makaram Raghunandan

    发明人： Makaram Raghunandan

    IPC分类号： G06F15/16

    CPC分类号： G06F9/526 ,  G06F9/3851 ,  G06F9/4843

    摘要： A token passing mechanism reduces unnecessary thread stalls in a multithreaded microprocessor system. In a multithreaded microprocessor system, in order processing for critical sections is managed through the use of tokens with access to each critical section restricted to the thread having the token associated with the critical section. A token handler maintains a token skip indicator per token that allows a thread that does not need a critical section to forward the token associated with that critical section to a next thread prior to reaching the critical section.

    摘要翻译： 令牌传递机制减少了多线程微处理器系统中不必要的线程停顿。 在多线程微处理器系统中，对于关键部分的顺序处理通过使用令牌来管理，该令牌访问限于具有与关键部分相关联的令牌的线程的每个关键部分。 令牌处理程序为每个令牌维护令牌跳过指示符，允许不需要关键部分的线程在到达临界部分之前将与该关键部分关联的令牌转发到下一个线程。

    Method for Processing Multiple Operations
    5.
    发明申请
    Method for Processing Multiple Operations 有权
    多操作处理方法

    公开(公告)号：US20080159528A1

    公开(公告)日：2008-07-03

    申请号：US11617418

    申请日：2006-12-28

    申请人： Wajdi Feghali ,  Stephanie Hirnak ,  Makaram Raghunandan ,  Yogesh Bansal ,  Kirk Yap ,  Gilbert M. Wolrich

    发明人： Wajdi Feghali ,  Stephanie Hirnak ,  Makaram Raghunandan ,  Yogesh Bansal ,  Kirk Yap ,  Gilbert M. Wolrich

    IPC分类号： H04L9/30 ,  H04L9/28

    CPC分类号： H04L63/0485 ,  G06F9/30181 ,  G06F9/3879 ,  H04L63/08

    摘要： In one embodiment, the present disclosure provides a method capable of processing a variety of different operations. A method according to one embodiment may include loading configuration data from a shared memory unit into a hardware configuration register, the hardware configuration register located within circuitry included within a hardware accelerator unit. The method may also include issuing a command set from a microengine to the hardware accelerator unit having the circuitry. The method may additionally include receiving the command set at the circuitry from the microengine, the command set configured to allow for the processing of a variety of different operations. The method may further include processing an appropriate operation based upon the configuration data loaded into the hardware configuration register. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.

    摘要翻译： 在一个实施例中，本公开提供了一种能够处理各种不同操作的方法。 根据一个实施例的方法可以包括将配置数据从共享存储器单元加载到硬件配置寄存器中，硬件配置寄存器位于包括在硬件加速器单元内的电路内。 该方法还可以包括从微引擎向具有该电路的硬件加速器单元发出命令集。 该方法可以另外包括接收来自微引擎的电路处的命令集，该命令集被配置为允许处理各种不同的操作。 该方法还可以包括基于加载到硬件配置寄存器中的配置数据来处理适当的操作。 当然，在不脱离本实施例的情况下，可以进行许多替代，变化和修改。

    TECHNIQUES FOR ACCESSING A TABLE
    6.
    发明申请
    TECHNIQUES FOR ACCESSING A TABLE 有权
    用于访问表的技术

    公开(公告)号：US20080052304A1

    公开(公告)日：2008-02-28

    申请号：US11467293

    申请日：2006-08-25

    申请人： Makaram Raghunandan

    发明人： Makaram Raghunandan

    IPC分类号： G06F17/00

    CPC分类号： H04L45/00 ,  H04L45/7457 ,  Y10S707/99932 ,  Y10S707/99942

    摘要： Techniques are described herein that can be used to access entries in a packed table. An unpacked table includes empty and filled elements. Filled elements can be accumulated and included in a packed table. An element in the packed table can be accessed by considering the location the element would have been located in the unpacked table. The location can be used to determine the location of the element in the packed table

    摘要翻译： 本文描述了可用于访问打包表中的条目的技术。 一个未打包的表包括空的和填充的元素。 填充元素可以累积并包含在包装表中。 可以通过考虑元素在未打包表中的位置来访问打包表中的元素。 该位置可用于确定打包表中元素的位置

    Method for processing multiple operations
    8.
    发明授权
    Method for processing multiple operations 有权
    处理多个操作的方法

    公开(公告)号：US07953221B2

    公开(公告)日：2011-05-31

    申请号：US11617418

    申请日：2006-12-28

    申请人： Wajdi Feghali ,  Stephanie Hirnak ,  Makaram Raghunandan ,  Yogesh Bansal ,  Kirk Yap ,  Gilbert M. Wolrich

    发明人： Wajdi Feghali ,  Stephanie Hirnak ,  Makaram Raghunandan ,  Yogesh Bansal ,  Kirk Yap ,  Gilbert M. Wolrich

    IPC分类号： H04K1/00 ,  H04K1/04 ,  H04K1/06 ,  H04L9/00 ,  H04L9/28 ,  H04L9/32

    CPC分类号： H04L63/0485 ,  G06F9/30181 ,  G06F9/3879 ,  H04L63/08

    摘要： In one embodiment, the present disclosure provides a method capable of processing a variety of different operations. A method according to one embodiment may include loading configuration data from a shared memory unit into a hardware configuration register, the hardware configuration register located within circuitry included within a hardware accelerator unit. The method may also include issuing a command set from a microengine to the hardware accelerator unit having the circuitry. The method may additionally include receiving the command set at the circuitry from the microengine, the command set configured to allow for the processing of a variety of different operations. The method may further include processing an appropriate operation based upon the configuration data loaded into the hardware configuration register. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.

    摘要翻译： 在一个实施例中，本公开提供了一种能够处理各种不同操作的方法。 根据一个实施例的方法可以包括将配置数据从共享存储器单元加载到硬件配置寄存器中，硬件配置寄存器位于包括在硬件加速器单元内的电路内。 该方法还可以包括从微引擎向具有该电路的硬件加速器单元发出命令集。 该方法可以另外包括接收来自微引擎的电路处的命令集，该命令集被配置为允许处理各种不同的操作。 该方法还可以包括基于加载到硬件配置寄存器中的配置数据来处理适当的操作。 当然，在不脱离本实施例的情况下，可以进行许多替代，变化和修改。

    System development tool
    9.
    发明申请
    System development tool 有权
    系统开发工具

    公开(公告)号：US20070006171A1

    公开(公告)日：2007-01-04

    申请号：US11171762

    申请日：2005-06-30

    申请人： Makaram Raghunandan ,  Rajendra Yavatkar ,  Shou Chen ,  Dave Edwards ,  Geoffrey Gustafson

    发明人： Makaram Raghunandan ,  Rajendra Yavatkar ,  Shou Chen ,  Dave Edwards ,  Geoffrey Gustafson

    IPC分类号： G06F9/44

    CPC分类号： G06F8/20 ,  G06F11/3636 ,  G06F11/3664

    摘要： According to some embodiments, execution information is received from a first development tool. Execution information is also received from a second development tool. Based on the first execution information and the second execution information, operation of the first development tool may be controlled. According to some embodiments, the first and second development tools are associated with different processor architectures.

    摘要翻译： 根据一些实施例，从第一开发工具接收执行信息。 还从第二个开发工具收到执行信息。 基于第一执行信息和第二执行信息，可以控制第一开发工具的操作。 根据一些实施例，第一和第二开发工具与不同的处理器架构相关联。

    Cross-architecture software development
    10.
    发明申请
    Cross-architecture software development 审中-公开
    跨架构软件开发

    公开(公告)号：US20060112397A1

    公开(公告)日：2006-05-25

    申请号：US10993326

    申请日：2004-11-18

    申请人： Makaram Raghunandan ,  Rajendra Yavatkar ,  Mark Skarpness

    发明人： Makaram Raghunandan ,  Rajendra Yavatkar ,  Mark Skarpness

    IPC分类号： G06F9/46 ,  G06F9/44

    CPC分类号： G06F8/20 ,  G06F11/3664

    摘要： In general, in one aspect, the disclosure describes a method that includes providing a user interface common to multiple development tools, different ones of the development tools dedicated to different processor architectures. The method also includes enabling communications between the user interface and the development tools.

    摘要翻译： 一般来说，一方面，本公开描述了一种方法，其包括提供多个开发工具共同的用户界面，专用于不同处理器架构的不同开发工具。 该方法还包括实现用户界面和开发工具之间的通信。