公开(公告)号：US08473603B2

公开(公告)日：2013-06-25

申请号：US12119828

申请日：2008-05-13

Applicant: Yixin Diao ,  Hidayatullah Habeebullah Shaikh ,  Maheswaran Surendra

Inventor： Yixin Diao ,  Hidayatullah Habeebullah Shaikh ,  Maheswaran Surendra

IPC: G06F15/173

CPC classification number: H04L41/00

Abstract: Techniques are disclosed for providing cross-tier management in a multi-tier computing system architecture. For example, a method for managing a computing system, wherein the computing system includes a first tier and at least a second tier, wherein the first tier and the second tier are configured to respond to a request received by the computing system, includes the steps of monitoring performance of the second tier from the first tier, and sending one or more management commands from the first tier to the second tier based on the monitored performance. In one embodiment, the first tier may be an application server tier of the computing system, and the second tier may be a database server tier of the computing system.

Abstract translation: 公开了用于在多层计算系统架构中提供跨层管理的技术。 例如，一种用于管理计算系统的方法，其中所述计算系统包括第一层和至少第二层，其中所述第一层和所述第二层被配置为响应所述计算系统接收到的请求，所述步骤包括以下步骤 监视来自第一层的第二层的性能，以及基于所监视的性能将一个或多个管理命令从第一层发送到第二层。 在一个实施例中，第一层可以是计算系统的应用服务器层，并且第二层可以是计算系统的数据库服务器层。

公开(公告)号：US20130013785A1

公开(公告)日：2013-01-10

申请号：US13617901

申请日：2012-09-14

Applicant: YIXIN DIAO ,  Joseph L. Hellerstein ,  Sam Sampson Lightstone ,  Adam J. Storm ,  Maheswaran Surendra

Inventor： YIXIN DIAO ,  Joseph L. Hellerstein ,  Sam Sampson Lightstone ,  Adam J. Storm ,  Maheswaran Surendra

IPC: G06F15/173

CPC classification number: G06F11/3495 ,  G06F9/5016 ,  G06F9/5033 ,  G06F11/3419 ,  G06F11/3452 ,  G06F2201/87

Abstract: In one embodiment, functional system elements are added to an autonomic manager to enable automatic online sample interval selection. In another embodiment, a method for determining the sample interval by continually characterizing the system workload behavior includes monitoring the system data and analyzing the degree to which the workload is stationary. This makes the online optimization method less sensitive to system noise and capable of being adapted to handle different workloads. The effectiveness of the autonomic optimizer is thereby improved, making it easier to manage a wide range of systems.

Abstract translation: 在一个实施例中，将功能系统元件添加到自主管理器以启用自动在线采样间隔选择。 在另一个实施例中，用于通过连续地表征系统工作负载行为来确定采样间隔的方法包括监视系统数据并分析工作负载静止的程度。 这使得在线优化方法对系统噪声不太敏感，并且能够适应于处理不同的工作负载。 从而改进了自主优化器的有效性，从而更容易地管理广泛的系统。

公开(公告)号：US07913227B2

公开(公告)日：2011-03-22

申请号：US11679999

申请日：2007-02-28

Applicant: Glenn C. Aikens ,  Melissa Jane Buco ,  Maheswaran Surendra ,  Christopher Ward ,  Steve Weinberger ,  Sam Shixiong Yang

Inventor： Glenn C. Aikens ,  Melissa Jane Buco ,  Maheswaran Surendra ,  Christopher Ward ,  Steve Weinberger ,  Sam Shixiong Yang

IPC: G06F9/44

CPC classification number: H04L41/085

Abstract: Techniques for managing a plurality of configuration items in an information repository are provided. Lifecycle state transitions of the plurality of configuration items are regulated in accordance with one or more lifecycle state transition diagrams and, when a life cycle state transition involves a protected life cycle state, one or more request for change identifiers.

Abstract translation: 提供了用于管理信息库中的多个配置项的技术。 根据一个或多个生命周期状态转换图来调节多个配置项的生命周期状态转换，并且当生命周期状态转换涉及受保护的生命周期状态时，对变化标识符进行一个或多个请求。

公开(公告)号：US20080215729A1

公开(公告)日：2008-09-04

申请号：US12119828

申请日：2008-05-13

Applicant: Yixin Diao ,  Hidayatullah Habeebullah Shaikh ,  Maheswaran Surendra

Inventor： Yixin Diao ,  Hidayatullah Habeebullah Shaikh ,  Maheswaran Surendra

IPC: G06F15/173

CPC classification number: H04L41/00

Abstract: Techniques are disclosed for providing cross-tier management in a multi-tier computing system architecture. For example, a method for managing a computing system, wherein the computing system includes a first tier and at least a second tier, wherein the first tier and the second tier are configured to respond to a request received by the computing system, includes the steps of monitoring performance of the second tier from the first tier, and sending one or more management commands from the first tier to the second tier based on the monitored performance. In one embodiment, the first tier may be an application server tier of the computing system, and the second tier may be a database server tier of the computing system.

Abstract translation: 公开了用于在多层计算系统架构中提供跨层管理的技术。 例如，一种用于管理计算系统的方法，其中所述计算系统包括第一层和至少第二层，其中所述第一层和所述第二层被配置为响应所述计算系统接收到的请求，所述步骤包括以下步骤 监视来自第一层的第二层的性能，以及基于所监视的性能将一个或多个管理命令从第一层发送到第二层。 在一个实施例中，第一层可以是计算系统的应用服务器层，并且第二层可以是计算系统的数据库服务器层。

公开(公告)号：US20070294309A1

公开(公告)日：2007-12-20

申请号：US11424901

申请日：2006-06-19

Applicant: Larisa Shwartz ,  Maheswaran Surendra ,  Naga A. Ayachitula ,  Genady Grabarnik ,  James S. Lipscomb

Inventor： Larisa Shwartz ,  Maheswaran Surendra ,  Naga A. Ayachitula ,  Genady Grabarnik ,  James S. Lipscomb

IPC: G06F17/30

CPC classification number: H04L47/78 ,  G06F9/5061 ,  G06F17/30091 ,  G06F2209/5011 ,  H04L41/0893 ,  H04L67/104 ,  H04L67/1055 ,  H04L67/34

Abstract: Embodiments of the present invention address deficiencies of the art in respect to server provisioning in a heterogeneous computing environment and provide a method, system and computer program product for secure and verified distributed orchestration and provisioning. In one embodiment of the invention, a server provisioning method can be provided. The server provisioning method can include establishing grouping criteria, grouping different target computing nodes into different groups of target computing nodes according to the established grouping criteria, server provisioning a root node in each of the different groups of target computing nodes, and relying upon the root node in each of the different groups to peer-to-peer server provision remaining nodes in each of the different groups.

Abstract translation: 本发明的实施例解决了在异构计算环境中关于服务器提供的本领域的缺点，并提供了用于安全和验证的分布式编排和供应的方法，系统和计算机程序产品。 在本发明的一个实施例中，可以提供服务器配置方法。 服务器配置方法可以包括建立分组标准，根据建立的分组标准将不同目标计算节点分组到不同的目标计算节点组，服务器在目标计算节点的不同组中的每一个中提供根节点，并依赖于根 节点在每个不同的组中，以对等服务器提供每个不同组中的剩余节点。

公开(公告)号：US20070233991A1

公开(公告)日：2007-10-04

申请号：US11278134

申请日：2006-03-30

Applicant: Yixin Diao ,  James Finnie ,  Christian Garcia-Arellano ,  Sam Lightstone ,  Lan Pham ,  Adam Storm ,  Maheswaran Surendra ,  Gary Valentin ,  Daniele Zilio

Inventor： Yixin Diao ,  James Finnie ,  Christian Garcia-Arellano ,  Sam Lightstone ,  Lan Pham ,  Adam Storm ,  Maheswaran Surendra ,  Gary Valentin ,  Daniele Zilio

IPC: G06F12/00

CPC classification number: G06F9/5016

Abstract: Methods and systems are provided for tuning memory allocated among a plurality of applications in a data processing system. In one implementation, the method includes generating memory benefit data for the plurality of applications, comparing the generated memory benefit data associated with each of the plurality of applications, and dynamically reallocating memory from one or more of the plurality of applications to one or more other of the plurality of applications based on the comparison. A method and system is also provided for tuning memory allocated among a plurality of individual memory consumers for a given application.

Abstract translation: 提供了用于调整在数据处理系统中的多个应用程序之间分配的存储器的方法和系统。 在一个实现中，该方法包括为多个应用产生存储器利益数据，比较与多个应用中的每一个相关联的生成的存储器利益数据，以及将存储器从多个应用中的一个或多个动态地重新分配给一个或多个其他应用 的多个应用程序。 还提供了一种方法和系统，用于调整针对给定应用的多个单独存储器消费者之间分配的存储器。

公开(公告)号：US20060267208A1

公开(公告)日：2006-11-30

申请号：US11405283

申请日：2006-04-17

Applicant: Matthew Colburn ,  Timothy Dalton ,  Elbert Huang ,  Simon Karecki ,  Satya Nitta ,  Sampath Purushothaman ,  Katherine Saenger ,  Maheswaran Surendra

Inventor： Matthew Colburn ,  Timothy Dalton ,  Elbert Huang ,  Simon Karecki ,  Satya Nitta ,  Sampath Purushothaman ,  Katherine Saenger ,  Maheswaran Surendra

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L21/76807 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method to form a closed air gap interconnect structure is described. A starting structure made of regions of a permanent support dielectric under the interconnect lines and surrounding interconnect vias with one or more sacrificial dielectrics present in the remaining portions of the interconnect structure, is capped with a dielectric barrier which is perforated using a stencil with a regular array of holes. The sacrificial dielectrics are then extracted through the holes in the dielectric barrier layer such that the interconnect lines are substantially surrounded by air except for the regions of the support dielectric under the lines. The holes in the cap layer are closed off by depositing a second barrier dielectric so that a closed air gap is formed. Several embodiments of this method and the resulting structures are described.

Abstract translation: 描述了形成闭合气隙互连结构的方法。 在互连线下方由永久支撑电介质的区域构成的起始结构和在互连结构的其余部分中存在的具有一个或多个牺牲电介质的周围的互连通孔被封装有电介质阻挡层，其使用具有规则的模板 孔阵列 然后通过电介质阻挡层中的孔提取牺牲电介质，使得互连线基本上被除了线下方的支撑电介质的区域之外的空气包围。 通过沉积第二阻挡电介质来封闭盖层中的孔，从而形成封闭的气隙。 描述该方法的几个实施例和所得到的结构。

公开(公告)号：US07056782B2

公开(公告)日：2006-06-06

申请号：US10786901

申请日：2004-02-25

Applicant: Ricky S. Amos ,  Diane C. Boyd ,  Cyril Cabral, Jr. ,  Richard D. Kaplan ,  Jakub T. Kedzierski ,  Victor Ku ,  Woo-Hyeong Lee ,  Ying Li ,  Anda C. Mocuta ,  Vijay Narayanan ,  An L. Steegen ,  Maheswaran Surendra

Inventor： Ricky S. Amos ,  Diane C. Boyd ,  Cyril Cabral, Jr. ,  Richard D. Kaplan ,  Jakub T. Kedzierski ,  Victor Ku ,  Woo-Hyeong Lee ,  Ying Li ,  Anda C. Mocuta ,  Vijay Narayanan ,  An L. Steegen ,  Maheswaran Surendra

IPC: H01L21/8238

CPC classification number: H01L21/76897 ,  H01L21/28052 ,  H01L21/28097 ,  H01L21/823835 ,  H01L29/66545 ,  H01L29/6656

Abstract: The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.

公开(公告)号：US06584368B2

公开(公告)日：2003-06-24

申请号：US10245461

申请日：2002-09-17

Applicant: Raymond J. Bunkofske ,  John Z. Colt, Jr. ,  James J. McGill ,  Nancy T. Pascoe ,  Maheswaran Surendra ,  Marc A. Taubenblatt ,  Asif Ghias

Inventor： Raymond J. Bunkofske ,  John Z. Colt, Jr. ,  James J. McGill ,  Nancy T. Pascoe ,  Maheswaran Surendra ,  Marc A. Taubenblatt ,  Asif Ghias

IPC: G05B1500

CPC classification number: G05B23/0221 ,  G05B2219/45031 ,  H01L22/20

Abstract: A method and structure for controlling a manufacturing tool includes measuring different manufacturing parameters of the tool, transforming a plurality of time series of the manufacturing parameters into intermediate variables based on restrictions and historical reference statistics, generating a surrogate variable based on the intermediate variables, if the surrogate variable exceeds a predetermined limit, identifying a first intermediate variable, of the intermediate variables, that caused the surrogate variable to exceed the predetermined limit and identifying a first manufacturing parameter associated with the first intermediate variable, and inhibiting further operation of the tool until the first manufacturing parameter has been modified to bring the surrogate value within the predetermined limit.

公开(公告)号：US06528363B2

公开(公告)日：2003-03-04

申请号：US09811707

申请日：2001-03-19

Applicant: Victor Ku ,  Maheswaran Surendra ,  Len Tsou ,  Ying Zhang

Inventor： Victor Ku ,  Maheswaran Surendra ,  Len Tsou ,  Ying Zhang

IPC: H01L21336

CPC classification number: H01L29/42376 ,  H01L21/28114

Abstract: A method of forming a notched gate structure having substantially vertical sidewalls and a sub-0.05 &mgr;m electrical critical dimension is provided. The method includes forming a conductive layer on an insulating layer; forming a mask on the conductive layer so as to at least protect a portion of the conductive layer; anisotropically etching the conductive layer not protected by the mask so as to thin the conductive layer to a predetermined thickness and to form a conductive feature underlying the mask, the conductive feature having substantially vertical sidewalls; forming a passivating layer at least on the substantially vertical sidewalls; and isotropically etching remaining conductive layer not protected by the mask to remove the predetermined thickness thereby exposing a lower portion of said conductive feature not containing the passivating layer, while simultaneously removing notched regions in the lower portion of the conductive feature.