摘要:
An analog-digital converter includes n comparators arranged in a first direction with a predetermined cell pitch and corresponding respectively to n input voltages, each comparator comparing a voltage value of a reference signal whose voltage value increases or decreases over time with an input voltage corresponding to the comparator. Each of the n comparators includes differential transistors to which the reference signal and the input voltage are given respectively. A differential transistor is formed by p unit transistors connected in series whose gates are given the reference signal, and another differential transistor is formed by p unit transistors connected in series whose gates are given the input voltage.
摘要:
Specifically, the solid-state imaging device includes: pixels each of which includes an amplifying transistor that amplifies a signal; first column signal lines each of which is connected to one of the columns of the pixels; first load transistors each of which is connected to one of the first column signal lines; a bias circuit which supplies a bias voltage to a gate of each of the first load transistors; first detection units each of which is connected to the one of the first column signal lines; a second detection unit which detects a noise component of each of the rows, the noise component occurring in each of the first column signal lines and resulting from fluctuation in the bias voltage; and a correction unit which corrects, the pixel signal detected by each of the first detection units, using the noise component detected by the second detection unit.
摘要:
A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.
摘要:
An analog-digital converter includes n comparators arranged in a first direction with a predetermined cell pitch and corresponding respectively to n input voltages, each comparator comparing a voltage value of a reference signal whose voltage value increases or decreases over time with an input voltage corresponding to the comparator. Each of the n comparators includes differential transistors to which the reference signal and the input voltage are given respectively. A differential transistor is formed by p unit transistors connected in series whose gates are given the reference signal, and another differential transistor is formed by p unit transistors connected in series whose gates are given the input voltage.
摘要:
A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.
摘要:
An automatic frequency tuning system according to the present invention includes an antenna, a tuner circuit, a video SAW filter, a video intermediate frequency amplifier, a video detector, a video amplifier, a video PLL circuit, an AFT control circuit, a microcomputer and a memory. In addition to the above members, the automatic frequency tuning system further includes a reference PLL circuit for reducing variation in a free running frequency of a video voltage controlled oscillator, a comparator for determining a magnitude relationship between a received video frequency and a standard video frequency, a mixer for mixing an output signal of the video control frequency and an output signal of a reference voltage controlled oscillator and retrieving sum and difference signals for frequencies of the outputs, and a mixer low pass filter for supplying only a frequency difference signal to a subsequent stage.
摘要:
Provided is a receiving circuit which determines whether a PLL circuit is at a locked state or a unlocked state, and thereby realizing an AFT system that operates correctly. The receiving circuit is a video/audio signal processing circuit which demodulates the first signal and the second signal included in a signal received from a tuner circuit. The video/audio signal processing circuit includes: a PLL circuit which generates a synchronizing signal synchronized with a phase of the received signal; a video demodulator which demodulates a signal including the first signal from the received signal, using the generated synchronizing signal; a second demodulator which demodulates the second signal from the received signal; and a lock detection circuit which determines whether the PLL circuit is at a locked state or an unlocked state by judging whether or not a frequency of the demodulated second signal is a predetermined value, and then outputs a lock detection signal representing the determination result to the PLL circuit. The PLL circuit changes a response speed of the phase synchronization based on the lock detection signal.
摘要:
A high image quality solid-state imaging device that reduces horizontal noise is provided. An embodiment of the solid-state imaging device of the present invention is a solid-state imaging device which reads a pixel signal from each of unit pixels selected on a row basis, including amplifying transistors each of which is arranged in a corresponding one of the unit pixels, first transistors each of which is arranged on a column basis and supplies bias current to one of the amplifying transistors corresponding to a selected row, an active transistor which generates a reference bias voltage, a bias signal line through which the reference bias voltage is supplied from the gate terminal of the active transistor to gate terminals of the first transistors; and a low-pass filter inserted to the bias signal line between the gate terminal of the active transistor and the gate terminals of the first transistors.
摘要:
An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.
摘要:
An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.