公开(公告)号：US20060066759A1

公开(公告)日：2006-03-30

申请号：US11230894

申请日：2005-09-21

申请人： Makoto Ikuma ,  Yasuo Oba

发明人： Makoto Ikuma ,  Yasuo Oba

IPC分类号： H04N5/50 ,  H04B1/18

CPC分类号： H04N5/4446 ,  H04N5/455 ,  H04N5/50

摘要： An automatic frequency tuning system according to the present invention includes an antenna, a tuner circuit, a video SAW filter, a video intermediate frequency amplifier, a video detector, a video amplifier, a video PLL circuit, an AFT control circuit, a microcomputer and a memory. In addition to the above members, the automatic frequency tuning system further includes a reference PLL circuit for reducing variation in a free running frequency of a video voltage controlled oscillator, a comparator for determining a magnitude relationship between a received video frequency and a standard video frequency, a mixer for mixing an output signal of the video control frequency and an output signal of a reference voltage controlled oscillator and retrieving sum and difference signals for frequencies of the outputs, and a mixer low pass filter for supplying only a frequency difference signal to a subsequent stage.

摘要翻译： 根据本发明的自动频率调谐系统包括天线，调谐器电路，视频SAW滤波器，视频中频放大器，视频检测器，视频放大器，视频PLL电路，AFT控制电路，微计算机和 一个记忆 除了上述部件之外，自动频率调谐系统还包括用于减小视频压控振荡器的自由运行频率变化的参考PLL电路，用于确定接收视频和标准视频之间的幅度关系的比较器 混频器，用于混合视频控制频率的输出信号和参考压控振荡器的输出信号，并且检索输出频率的和和差分信号;以及混频器低通滤波器，用于仅将频差信号提供给 后续阶段

公开(公告)号：US07126430B2

公开(公告)日：2006-10-24

申请号：US11059561

申请日：2005-02-17

申请人： Yasuo Oba ,  Makoto Ikuma

发明人： Yasuo Oba ,  Makoto Ikuma

IPC分类号： H03L7/00

CPC分类号： H03L7/0805 ,  H03L7/07 ,  H03L2207/06

摘要： The frequency of a first voltage controlled oscillator is stabilized in a first PLL circuit part into which a reference frequency signal is inputted. In addition, a second PLL circuit part is formed by inputting a control voltage which is the same as the frequency control voltage of the first voltage controlled oscillator into a second voltage controlled oscillator having the same configuration as the first voltage controlled oscillator. The first PLL circuit part is provided with first and second variable frequency dividers which respectively divide the reference frequency signal and the output of the first voltage controlled oscillator. In response to an input signal into the second PLL circuit part, the free-running frequencies of the second and first voltage controlled oscillators are switched, and at the same time, the division ratio of first and second variable frequency dividers are switched.

摘要翻译： 在输入基准频率信号的第一PLL电路部分中稳定第一压控振荡器的频率。 此外，通过将与第一压控振荡器的频率控制电压相同的控制电压输入到具有与第一压控振荡器相同的配置的第二压控振荡器中，形成第二PLL电路部分。 第一PLL电路部分设置有分别划分参考频率信号和第一压控振荡器的输出的第一和第二可变分频器。 响应于第二PLL电路部分的输入信号，切换第二和第一压控振荡器的自由运行频率，同时切换第一和第二可变分频器的分频比。

公开(公告)号：US20060116098A1

公开(公告)日：2006-06-01

申请号：US11280280

申请日：2005-11-17

申请人： Yasuo Oba ,  Makoto Ikuma

发明人： Yasuo Oba ,  Makoto Ikuma

IPC分类号： H04B1/26

CPC分类号： H04N5/4446 ,  H04N5/46 ,  H04N5/60 ,  H04N5/62

摘要： In a sound intermediate frequency conversion circuit, a second mixer receives an output of a first mixer which converts a first SIF; reference signal sources and receives an output of a frequency divider. The output of the reference signal source is got through the divider, and then a frequency conversion is performed by the second mixer so that the second SIF has a constant value. A frequency dividing ratio of the frequency divider is selected according to a frequency difference between a VIF and a first SIF. Thus, a conversion to a constant frequency is possible without deteriorating sound reception performance in a television receiver mounted in a mobile object.

摘要翻译： 在声音中频变换电路中，第二混频器接收转换第一SIF的第一混频器的输出; 参考信号源并接收分频器的输出。 参考信号源的输出通过分频器获得，然后由第二混频器进行频率转换，使得第二SIF具有恒定值。 根据VIF和第一SIF之间的频率差选择分频器的分频比。 因此，可以在安装在移动体中的电视接收机中不损害声音接收性能的情况下转换为恒定频率。

公开(公告)号：US20050184810A1

公开(公告)日：2005-08-25

申请号：US11059561

申请日：2005-02-17

申请人： Yasuo Oba ,  Makoto Ikuma

发明人： Yasuo Oba ,  Makoto Ikuma

IPC分类号： H03L7/087 ,  H03L7/00 ,  H03L7/07

CPC分类号： H03L7/0805 ,  H03L7/07 ,  H03L2207/06

摘要： The frequency of a first voltage controlled oscillator is stabilized in a first PLL circuit part into which a reference frequency signal is inputted. In addition, a second PLL circuit part is formed by inputting a control voltage which is the same as the frequency control voltage of the first voltage controlled oscillator into a second voltage controlled oscillator having the same configuration as the first voltage controlled oscillator. The first PLL circuit part is provided with first and second variable frequency dividers which respectively divide the reference frequency signal and the output of the first voltage controlled oscillator. In response to an input signal into the second PLL circuit part, the free-running frequencies of the second and first voltage controlled oscillators are switched, and at the same time, the division ratio of first and second variable frequency dividers are switched.

摘要翻译： 在输入基准频率信号的第一PLL电路部分中稳定第一压控振荡器的频率。 此外，通过将与第一压控振荡器的频率控制电压相同的控制电压输入到具有与第一压控振荡器相同的配置的第二压控振荡器中，形成第二PLL电路部分。 第一PLL电路部分设置有分别划分参考频率信号和第一压控振荡器的输出的第一和第二可变分频器。 响应于第二PLL电路部分的输入信号，切换第二和第一压控振荡器的自由运行频率，同时切换第一和第二可变分频器的分频比。

公开(公告)号：US08754973B2

公开(公告)日：2014-06-17

申请号：US13591989

申请日：2012-08-22

申请人： Makoto Ikuma ,  Yutaka Abe

发明人： Makoto Ikuma ,  Yutaka Abe

IPC分类号： H04N3/14

CPC分类号： H04N5/3575 ,  H04N5/3745 ,  H04N5/378

摘要： A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.

摘要翻译： 固态成像装置包括以行和列排列的单位像素，并从针对每一行选择的单位像素读取像素信号。 该装置包括：为单位像素的列提供的列信号线; 放大单位像素中包含的晶体管，并输出像素信号; 提供给单位像素的列的相关双采样单元，并且每个对像素信号的复位分量执行相关双采样，以及对包括复位分量的数据分量和像素信号的信号分量进行采样，以对信号分量 ; 以及插入在放大晶体管的输出端子和相关双采样单元之间的列信号线中的（i）的低通滤波器或包括在相关双采样单元中的（ii）。

公开(公告)号：US08520107B2

公开(公告)日：2013-08-27

申请号：US13167345

申请日：2011-06-23

申请人： Kazuko Nishimura ,  Makoto Ikuma ,  Yutaka Abe

发明人： Kazuko Nishimura ,  Makoto Ikuma ,  Yutaka Abe

IPC分类号： H04N3/14 ,  H04N5/217

CPC分类号： H04N5/37455 ,  H01L27/146 ,  H03K5/24 ,  H03K5/2481 ,  H03M1/123 ,  H03M1/56 ,  H04N5/3745

摘要： An analog-digital converter includes n comparators arranged in a first direction with a predetermined cell pitch and corresponding respectively to n input voltages, each comparator comparing a voltage value of a reference signal whose voltage value increases or decreases over time with an input voltage corresponding to the comparator. Each of the n comparators includes differential transistors to which the reference signal and the input voltage are given respectively. A differential transistor is formed by p unit transistors connected in series whose gates are given the reference signal, and another differential transistor is formed by p unit transistors connected in series whose gates are given the input voltage.

摘要翻译： 模拟数字转换器包括n个比较器，它们以预定的单元间距排列在第一方向上，分别对应于n个输入电压，每个比较器比较其电压值随时间增加或减小的参考信号的电压值与对应于 比较器。 n个比较器中的每一个包括分别给出参考信号和输入电压的差分晶体管。 差分晶体管由串联连接的p单位晶体管形成，栅极被赋予参考信号，另一个差分晶体管由串联连接的p单位晶体管形成，栅极被赋予输入电压。

公开(公告)号：US20110254986A1

公开(公告)日：2011-10-20

申请号：US13167345

申请日：2011-06-23

申请人： Kazuko Nishimura ,  Makoto Ikuma ,  Yutaka Abe

发明人： Kazuko Nishimura ,  Makoto Ikuma ,  Yutaka Abe

IPC分类号： H04N5/335 ,  H01L25/00 ,  H03M1/12

CPC分类号： H04N5/37455 ,  H01L27/146 ,  H03K5/24 ,  H03K5/2481 ,  H03M1/123 ,  H03M1/56 ,  H04N5/3745

摘要： An analog-digital converter includes n comparators arranged in a first direction with a predetermined cell pitch and corresponding respectively to n input voltages, each comparator comparing a voltage value of a reference signal whose voltage value increases or decreases over time with an input voltage corresponding to the comparator. Each of the n comparators includes differential transistors to which the reference signal and the input voltage are given respectively. A differential transistor is formed by p unit transistors connected in series whose gates are given the reference signal, and another differential transistor is formed by p unit transistors connected in series whose gates are given the input voltage.

摘要翻译： 模拟数字转换器包括n个比较器，它们以预定的单元间距排列在第一方向上，分别对应于n个输入电压，每个比较器比较其电压值随时间增加或减小的参考信号的电压值与对应于 比较器。 n个比较器中的每一个包括分别给出参考信号和输入电压的差分晶体管。 差分晶体管由串联连接的p单位晶体管形成，栅极被赋予参考信号，另一个差分晶体管由串联连接的p单位晶体管形成，栅极被赋予输入电压。

公开(公告)号：US07528659B2

公开(公告)日：2009-05-05

申请号：US11963944

申请日：2007-12-24

申请人： Akio Yokoyama ,  Makoto Ikuma

发明人： Akio Yokoyama ,  Makoto Ikuma

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45659 ,  H03F2203/45008 ,  H03F2203/45681

摘要： An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.

摘要翻译： 提供辅助电流源，其包括MOS晶体管，其将启动辅助电流馈送到放大差分放大器的输出并产生输出公共电压的输出共模电压产生电路的输入部分，并且提供包括MOS的校正电流源 晶体管馈送对应于辅助电流的校正电流到共模反馈比较器。 因此，即使在差分放大器的输入在开始的动态范围之外的情况下，也可以正确启动将输出公共电压控制为预定电压的控制回路，从而将输出公共电压稳定在期望的电压。

公开(公告)号：US20080157873A1

公开(公告)日：2008-07-03

申请号：US11963944

申请日：2007-12-24

申请人： Akio Yokoyama ,  Makoto Ikuma

发明人： Akio Yokoyama ,  Makoto Ikuma

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45659 ,  H03F2203/45008 ,  H03F2203/45681

摘要： An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.

摘要翻译： 提供辅助电流源，其包括MOS晶体管，其将启动辅助电流馈送到放大差分放大器的输出并产生输出公共电压的输出共模电压产生电路的输入部分，并且提供包括MOS的校正电流源 晶体管馈送对应于辅助电流的校正电流到共模反馈比较器。 因此，即使在差分放大器的输入在开始的动态范围之外的情况下，也可以正确启动将输出公共电压控制为预定电压的控制回路，从而将输出公共电压稳定在期望的电压。