公开(公告)号：US07100448B2

公开(公告)日：2006-09-05

申请号：US10945889

申请日：2004-09-22

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: G01P15/12

CPC classification number: G01P15/123 ,  G01P1/023 ,  G01P2015/084 ,  G01P2015/0842

Abstract: An accelerometer includes: a sensor chip including a weight portion for detecting a force imparted from outside, a frame portion that surrounds the weight portion, a beam portion that is deflectable and flexibly supports the weight portion, and a sensor element whose electric resistance varies depending on an amount by which the beam portion deflects; and a spacer provided at a position on a surface of a mounting substrate which position corresponds to the central portion of the weight portion. The sensor chip is mounted on the mounting substrate with a bottom surface of the frame portion being fixed at a predetermined position on the mounting substrate by an adhesive portion. The spacer has a thickness greater than that of the adhesive portion and may be formed by an adhesive concurrently with the adhesive portion, with a gap being maintained between the bottom surface of the weight portion and the spacer. The spacer serves to restrict an amount of downward movement of the weight portion which occurs when the beam portion deflects.

Abstract translation: 一种加速度计包括：传感器芯片，包括用于检测从外部施加的力的重量部分，围绕重物部分的框架部分，可偏转且柔性地支撑重物部分的梁部分，以及电阻变化依赖的传感器元件 在梁部分偏转的量上; 以及设置在安装基板的表面上的位置上的间隔件，该间隔对应于重量部分的中心部分。 传感器芯片安装在安装基板上，框架部分的底面通过粘合部分固定在安装基板上的预定位置。 间隔件的厚度大于粘合剂部分的厚度，并且可以与粘合剂部分同时地由粘合剂形成，并且在重量部分的底表面和间隔件之间保持间隙。 间隔件用于限制当梁部分偏转时发生的重量部分的向下运动的量。

公开(公告)号：US06624010B2

公开(公告)日：2003-09-23

申请号：US10320507

申请日：2002-12-17

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: H01L2184

CPC classification number: H01L21/76264 ,  H01L21/7624 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing an SOI substrate, (2) forming a metal layer on the SOI substrate, (3) performing a first anneal treatment to the metal layer at a relatively low temperature in order to transform the metal layer to a first silicide layer, (4) forming an insulating layer on the first silicide layer, and (5) forming a contact hole, which reaches the first silicide layer, in the insulating layer; and (6) performing a second anneal treatment to the silicide layer at a relatively high temperature in order to transform the first silicide layer to a second silicide layer.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：（1）制备SOI衬底，（2）在SOI衬底上形成金属层，（3）在较低温度下对金属层进行第一退火处理 为了将金属层转化为第一硅化物层，（4）在第一硅化物层上形成绝缘层，和（5）在绝缘层中形成到达第一硅化物层的接触孔; 和（6）在相对高的温度下对硅化物层进行第二退火处理，以便将第一硅化物层转变为第二硅化物层。

公开(公告)号：US20070215966A1

公开(公告)日：2007-09-20

申请号：US11649217

申请日：2007-01-04

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: H01L29/82 ,  H01L29/84

CPC classification number: H01L29/84 ,  G01P15/0802 ,  G01P15/123 ,  G01P15/18 ,  G01P2015/0842

Abstract: A piezoresistance element formed in a semiconductor substrate, includes a pair of contact regions formed in the semiconductor substrate; a groove formed between the pair of contact regions; a resistance layer formed in the groove, the resistance layer having a conductive type opposing to the semiconductor substrate; and a silicon layer formed on the resistance layer, the silicon layer having a conductive type corresponding to the semiconductor substrate.

Abstract translation: 形成在半导体衬底中的压阻元件包括形成在半导体衬底中的一对接触区域; 形成在所述一对接触区域之间的凹槽; 形成在所述沟槽中的电阻层，所述电阻层具有与所述半导体衬底相对的导电类型; 以及形成在所述电阻层上的硅层，所述硅层具有对应于所述半导体衬底的导电类型。

公开(公告)号：US07029957B2

公开(公告)日：2006-04-18

申请号：US10625544

申请日：2003-07-24

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: H01L21/00

CPC classification number: H01L21/76264 ,  H01L21/7624 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing an SOI substrate, (2) forming a metal layer on the SOI substrate, (3) performing a first anneal treatment to the metal layer at a relatively low temperature in order to transform the metal layer to a first silicide layer, (4) forming an insulating layer on the first silicide layer, and (5) forming a contact hole, which reaches the first silicide layer, in the insulating layer; and (6) performing a second anneal treatment to the silicide layer at a relatively high temperature in order to transform the first silicide layer to a second silicide layer.

公开(公告)号：US07004030B2

公开(公告)日：2006-02-28

申请号：US10671427

申请日：2003-09-26

Applicant: Naokatsu Ikegami ,  Takasumi Kobayashi

Inventor： Naokatsu Ikegami ,  Takasumi Kobayashi

IPC: G01P15/02

CPC classification number: G01P15/123 ,  G01P2015/084

Abstract: An acceleration sensor capable of standing a great acceleration is to be provided. It is configured of a mounting board and a sensor chip in which the sensor chip is formed of a weight, a beam and a frame. Then, the weight is surrounded by the frame. The weight is joined to the frame by a plurality of the beams, and the weight is separated from the board by being supported by the beams. Additionally, a thin, rectangular stopper is disposed on the mounting board right under the weight.

Abstract translation: 提供能够承受很大加速度的加速度传感器。 它由安装板和传感器芯片构成，其中传感器芯片由重物，梁和框架形成。 然后，重量被框架包围。 重量通过多个梁连接到框架，并且重量通过由梁支撑而与板分离。 另外，一块薄的矩形止动器设置在安装板正下方的重物上。

公开(公告)号：US20050266599A1

公开(公告)日：2005-12-01

申请号：US11065062

申请日：2005-02-25

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: G01P15/12 ,  B81B3/00 ,  B81C1/00 ,  H01L21/00 ,  H01L21/301 ,  H01L29/84

CPC classification number: B81C1/00896

Abstract: Micro-electrical-mechanical systems are fabricated in a substrate having a sacrificial layer sandwiched between two semiconductor layers. The semiconductor layers are selectively etched to create non-etched frames and etched microstructures immobilized within the frames by the sacrificial layer. An adhesive sheet is attached to one surface of the substrate, and the substrate is diced into chips, each including one frame and one immobilized microstructure. The sacrificial layer is then selectively etched to free a movable member in each microstructure. Finally, the chips are detached from the adhesive sheet, each chip becoming a micro-electrical-mechanical system. This fabrication method provides a simple and inexpensive way to avoid damage to the microstructure during the dicing process.

Abstract translation: 在具有夹在两个半导体层之间的牺牲层的衬底中制造微电气机械系统。 选择性地蚀刻半导体层以通过牺牲层产生固定在框架内的非蚀刻框架和蚀刻微结构。 将粘合片连接到基板的一个表面上，将基板切成芯片，每个芯片包括一个框架和一个固定的微结构。 然后选择性地蚀刻牺牲层以在每个微结构中释放可移动部件。 最后，将芯片与粘合片分离，每个芯片变成微机电系统。 该制造方法提供了一种简单且廉价的方法，以避免在切割过程中损坏微结构。

公开(公告)号：US20050236682A1

公开(公告)日：2005-10-27

申请号：US10995406

申请日：2004-11-24

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: G01P15/02 ,  B81B3/00 ,  B81C1/00 ,  B81C3/00 ,  G01P15/08 ,  H01L29/84

CPC classification number: B81C3/008 ,  G01P15/0802 ,  G01P2015/0828

Abstract: The present invention provides a method of manufacturing MEMS devices, comprising the steps of forming MEMS device bodies in a first substrate, defining concave portions around the MEMS device bodies over the first substrate, forming convex portions coincident with the concave portions in a second substrate, fitting the convex portions in the concave portions, respectively, to join the first substrate and the second substrate to each other, thereby forming a third substrate, sticking the third substrate to a UV sheet on the second substrate side, and dicing the third substrate to separate the MEMS device bodies from one another.

Abstract translation: 本发明提供一种制造MEMS器件的方法，包括以下步骤：在第一衬底中形成MEMS器件本体，在第一衬底上限定围绕MEMS器件本体的凹部，形成与第二衬底中的凹部重合的凸部， 将凹部分别嵌入凹部，使第一基板和第二基板彼此接合，由此形成第三基板，将第三基板粘贴在第二基板侧的UV片上，将第三基板切割成 将MEMS器件本体彼此分开。

公开(公告)号：US06500745B1

公开(公告)日：2002-12-31

申请号：US09978052

申请日：2001-10-17

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: H01L213205

CPC classification number: H01L21/31116 ,  H01L29/6659

Abstract: A method for manufacturing a field effect transistor includes a first step for etching 70%˜90% of the thickness of an insulating film (SiO2 or Si3N4) formed covering a gate electrode formed on a silicon semiconductor substrate; and a second step for etching a remaining insulating film to remove an unnecessary portion, other than sidewall spacers, of the remaining insulating film. The two etching steps are respectively for the purpose of vertical processing of the sidewall spacers formed on each side of the gate electrode and securing a high etch selectivity ratio of the insulating film to the silicon substrate.

Abstract translation: 一种用于制造场效应晶体管的方法包括：第一步骤，用于蚀刻覆盖形成在硅半导体衬底上的栅电极形成的绝缘膜（SiO 2或Si 3 N 4）的70％〜90％的厚度; 以及第二步骤，用于蚀刻剩余的绝缘膜以去除剩余绝缘膜的除侧壁间隔物之外的不需要的部分。 两个蚀刻步骤分别用于垂直处理形成在栅电极的每一侧上的侧壁间隔物，并确保绝缘膜与硅衬底的高蚀刻选择比。

公开(公告)号：US07153716B2

公开(公告)日：2006-12-26

申请号：US11065062

申请日：2005-02-25

Applicant: Naokatsu Ikegami

Inventor： Naokatsu Ikegami

IPC: H01L21/00

CPC classification number: B81C1/00896

Abstract: Micro-electrical-mechanical systems are fabricated in a substrate having a sacrificial layer sandwiched between two semiconductor layers. The semiconductor layers are selectively etched to create non-etched frames and etched microstructures immobilized within the frames by the sacrificial layer. An adhesive sheet is attached to one surface of the substrate, and the substrate is diced into chips, each including one frame and one immobilized microstructure. The sacrificial layer is then selectively etched to free a movable member in each microstructure. Finally, the chips are detached from the adhesive sheet, each chip becoming a micro-electrical-mechanical system. This fabrication method provides a simple and inexpensive way to avoid damage to the microstructure during the dicing process.

Abstract translation: 在具有夹在两个半导体层之间的牺牲层的衬底中制造微电气机械系统。 选择性地蚀刻半导体层以通过牺牲层产生固定在框架内的非蚀刻框架和蚀刻微结构。 将粘合片连接到基板的一个表面上，将基板切成芯片，每个芯片包括一个框架和一个固定的微结构。 然后选择性地蚀刻牺牲层以在每个微结构中释放可移动部件。 最后，将芯片与粘合片分离，每个芯片变成微机电系统。 该制造方法提供了一种简单且廉价的方法，以避免在切割过程中损坏微结构。

公开(公告)号：US20050097960A1

公开(公告)日：2005-05-12

申请号：US10671427

申请日：2003-09-26

Applicant: Naokatsu Ikegami ,  Takasumi Kobayashi

Inventor： Naokatsu Ikegami ,  Takasumi Kobayashi

IPC: G01P15/12 ,  G01P15/02

CPC classification number: G01P15/123 ,  G01P2015/084

Abstract: An acceleration sensor capable of standing a great acceleration is to be provided. It is configured of a mounting board and a sensor chip in which the sensor chip is formed of a weight, a beam and a frame. Then, the weight is surrounded by the frame. The weight is joined to the frame by a plurality of the beams, and the weight is separated from the board by being supported by the beams. Additionally, a thin, rectangular stopper is disposed on the mounting board right under the weight.

Abstract translation: 提供能够承受很大加速度的加速度传感器。 它由安装板和传感器芯片构成，其中传感器芯片由重物，梁和框架形成。 然后，重量被框架包围。 重量通过多个梁连接到框架，并且重量通过由梁支撑而与板分离。 另外，一块薄的矩形止动器设置在安装板正下方的重物上。