公开(公告)号：US20090146939A1

公开(公告)日：2009-06-11

申请号：US12370361

申请日：2009-02-12

申请人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

发明人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display apparatus to which the present invention is applied has a first data conversion circuit and a second data conversion circuit. The first data conversion circuit converts each predetermined number of display data included in prepared display data into pixel data in which the respective display data are arranged in a predetermined arranging order and in time-series. The second data conversion circuit is provided for each the predetermined number of signal lines included in the display apparatus and sequentially applies display signal voltages corresponding to the pixel data to the predetermined number of signal lines respectively. The liquid crystal display apparatus equalizes the amounts of charges to be written in respective display pixels by reversing the arranging order of the display data in the pixel data and the order of applying the display signal voltages to the signal lines per field period or per horizontal scanning period.

摘要翻译： 应用本发明的液晶显示装置具有第一数据转换电路和第二数据转换电路。 第一数据转换电路将预定显示数据中包括的预定数量的显示数据转换成按照预定的排列顺序和时间序列排列各显示数据的像素数据。 针对包括在显示装置中的每个预定数量的信号线提供第二数据转换电路，并且将与像素数据相对应的显示信号电压分别顺序地施加到预定数量的信号线。 液晶显示装置通过反转像素数据中的显示数据的排列顺序和将每个场周期或每个水平扫描的显示信号电压施加到信号线的顺序来均衡要写入各个显示像素的电荷量 期。

公开(公告)号：US06677898B2

公开(公告)日：2004-01-13

申请号：US10230351

申请日：2002-08-29

申请人： Jun Cheng ,  Akifumi Hirata ,  Takashi Ohira ,  Kyouichi Iigusa ,  Takuyo Nakaji ,  Nobuyoshi Kikuma ,  Naoki Inagaki

发明人： Jun Cheng ,  Akifumi Hirata ,  Takashi Ohira ,  Kyouichi Iigusa ,  Takuyo Nakaji ,  Nobuyoshi Kikuma ,  Naoki Inagaki

IPC分类号： H01Q322

CPC分类号： H01Q19/32 ,  H01Q3/24

摘要： An adaptive controller for an ESPAR antenna randomly perturbs a bias voltage vector V(n) composed of elements of bias voltage values Vm by a random vector R(n) generated by a random number generator, compares an objective function value J(n) of a cross correlation coefficient for a bias voltage vector V(n) before the perturbation with an objective function value J(n+1) of a cross correlation coefficient for a bias voltage vector V(n+1) after the perturbation, and selects and sets the bias voltage Vm corresponding to that when the cross correlation coefficient increases before and after the perturbation. Then the adaptive controller repeats the random perturbation and setting from the bias voltage of respective varactor diodes. This leads to that it is not necessary to provide a long training sequence signal, and the control process can be executed with learning so that a performance can be improved every iteration for search.

摘要翻译： 用于ESPAR天线的自适应控制器随机扰乱由随机数发生器产生的随机向量R（n）由偏置电压值Vm的元素组成的偏置电压矢量V（n），比较目标函数值J（n） 在扰动之前的偏置电压矢量V（n）与偏移电压矢量V（n + 1）的互相关系数的目标函数值J（n + 1）之后的偏置电压矢量V（n）的互相关系数，并且选择和 设置与互扰相关系数增加前后的偏置电压Vm。 然后，自适应控制器从相应的变容二极管的偏置电压重复随机扰动和设置。 这导致不需要提供长的训练序列信号，并且可以通过学习来执行控制过程，使得可以在每次迭代搜索时提高性能。

公开(公告)号：US20050156862A1

公开(公告)日：2005-07-21

申请号：US11023116

申请日：2004-12-27

申请人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

发明人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

IPC分类号： G02F1/133 ,  G02F1/136 ,  G09G3/20 ,  G09G3/36 ,  H04N5/66

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display apparatus to which the present invention is applied has a first data conversion circuit and a second data conversion circuit. The first data conversion circuit converts each predetermined number of display data included in prepared display data into pixel data in which the respective display data are arranged in a predetermined arranging order and in time-series. The second data conversion circuit is provided for each the predetermined number of signal lines included in the display apparatus and sequentially applies display signal voltages corresponding to the pixel data to the predetermined number of signal lines respectively. The liquid crystal display apparatus equalizes the amounts of charges to be written in respective display pixels by reversing the arranging order of the display data in the pixel data and the order of applying the display signal voltages to the signal lines per field period or per horizontal scanning period.

摘要翻译： 应用本发明的液晶显示装置具有第一数据转换电路和第二数据转换电路。 第一数据转换电路将预定显示数据中包括的预定数量的显示数据转换成按照预定的排列顺序和时间序列排列各显示数据的像素数据。 针对包括在显示装置中的每个预定数量的信号线提供第二数据转换电路，并且将与像素数据相对应的显示信号电压分别顺序地施加到预定数量的信号线。 液晶显示装置通过反转像素数据中的显示数据的排列顺序和将每个场周期或每个水平扫描的显示信号电压施加到信号线的顺序来均衡要写入各个显示像素的电荷量 期。

公开(公告)号：US08294655B2

公开(公告)日：2012-10-23

申请号：US12370361

申请日：2009-02-12

申请人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

发明人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display apparatus to which the present invention is applied has a first data conversion circuit and a second data conversion circuit. The first data conversion circuit converts each predetermined number of display data included in prepared display data into pixel data in which the respective display data are arranged in a predetermined arranging order and in time-series. The second data conversion circuit is provided for each the predetermined number of signal lines included in the display apparatus and sequentially applies display signal voltages corresponding to the pixel data to the predetermined number of signal lines respectively. The liquid crystal display apparatus equalizes the amounts of charges to be written in respective display pixels by reversing the arranging order of the display data in the pixel data and the order of applying the display signal voltages to the signal lines per field period or per horizontal scanning period.

摘要翻译： 应用本发明的液晶显示装置具有第一数据转换电路和第二数据转换电路。 第一数据转换电路将预定显示数据中包括的预定数量的显示数据转换成按照预定的排列顺序和时间序列排列各显示数据的像素数据。 针对包括在显示装置中的每个预定数量的信号线提供第二数据转换电路，并且将与像素数据相对应的显示信号电压分别顺序地施加到预定数量的信号线。 液晶显示装置通过反转像素数据中的显示数据的排列顺序和将每个场周期或每个水平扫描的显示信号电压施加到信号线的顺序来均衡要写入各个显示像素的电荷量 期。

公开(公告)号：US07511691B2

公开(公告)日：2009-03-31

申请号：US11023116

申请日：2004-12-27

申请人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

发明人： Ryuichi Hirayama ,  Shunji Kashiyama ,  Naoki Inagaki

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display apparatus to which the present invention is applied has a first data conversion circuit and a second data conversion circuit. The first data conversion circuit converts each predetermined number of display data included in prepared display data into pixel data in which the respective display data are arranged in a predetermined arranging order and in time-series. The second data conversion circuit is provided for each the predetermined number of signal lines included in the display apparatus and sequentially applies display signal voltages corresponding to the pixel data to the predetermined number of signal lines respectively. The liquid crystal display apparatus equalizes the amounts of charges to be written in respective display pixels by reversing the arranging order of the display data in the pixel data and the order of applying the display signal voltages to the signal lines per field period or per horizontal scanning period.

摘要翻译： 应用本发明的液晶显示装置具有第一数据转换电路和第二数据转换电路。 第一数据转换电路将预定显示数据中包括的预定数量的显示数据转换成按照预定的排列顺序和时间序列排列各显示数据的像素数据。 针对包括在显示装置中的每个预定数量的信号线提供第二数据转换电路，并且将与像素数据相对应的显示信号电压分别顺序地施加到预定数量的信号线。 液晶显示装置通过反转像素数据中的显示数据的排列顺序和将每个场周期或每个水平扫描的显示信号电压施加到信号线的顺序来均衡要写入各个显示像素的电荷量 期。

公开(公告)号：US4578811A

公开(公告)日：1986-03-25

申请号：US532501

申请日：1983-09-14

申请人： Naoki Inagaki

发明人： Naoki Inagaki

IPC分类号： G06K9/62 ,  G06F3/023 ,  G06K9/03 ,  G06K9/46 ,  G06K9/68 ,  G06K9/00

CPC分类号： G06F3/0233 ,  G06K9/6857

摘要： A key-in device has a key-in section with a matrix array of keys. A key-actuated signal corresponding to a handwritten character input by the key-in section is input to an input pattern memory of a character recognition section, where an input pattern is formed and stored. The character recognition section has a standard pattern memory, having stored the standard pattern of a character to be recognized. A first feature detecting section extracts feature data from the input pattern in the input pattern memory. A first matching section detects a standard pattern coincident with the feature data extracted from the first standard pattern memory, and produces the character data input by the key-in section as a recognizable character.

摘要翻译： 键入设备具有键矩阵阵列的键入部分。 与由键入部分输入的手写字符相对应的键致动信号被输入到形成并存储输入图案的字符识别部分的输入图形存储器。 字符识别部分具有标准图案存储器，其存储要识别的字符的标准图案。 第一特征检测部分从输入图案存储器中的输入图案提取特征数据。 第一匹配部分检测与从第一标准图案存储器提取的特征数据一致的标准图案，并且产生由键入部分输入的字符数据作为可识别字符。

公开(公告)号：US20110157501A1

公开(公告)日：2011-06-30

申请号：US12962892

申请日：2010-12-08

申请人： Minoru USUI ,  Ryuichi Hirayama ,  Naoki Inagaki

发明人： Minoru USUI ,  Ryuichi Hirayama ,  Naoki Inagaki

IPC分类号： G02F1/1333

CPC分类号： G09G3/18 ,  G02F2001/13775 ,  G03B17/20 ,  G03B19/12 ,  G09G2300/0408 ,  G09G2310/0218 ,  G09G2310/065 ,  G09G2310/08 ,  G09G2320/0223

摘要： When a signal, which is switched between a first level (0 V) and a second level (Vseg) in a predetermined cycle, is input to a common electrode and respective segment electrodes of a plurality of polymer network (PN) liquid crystal display elements to be subjected to static driving, the plurality of PN liquid crystal display elements are divided into two or more groups. The level switching of a signal (SEG-A) that is output to the segment electrode of the PN liquid crystal display element included in one group and the level switching of a signal (SEG-B) that is output to the segment electrode of the PN liquid crystal display element as each signal output to the respective segment electrodes of the plurality of PN liquid crystal display elements are performed at timings that do not overlap each other.

摘要翻译： 当在预定周期中在第一电平（0V）和第二电平（Vseg）之间切换的信号被输入到公共电极和多个聚合物网络（PN）液晶显示元件的各个段电极 要进行静态驱动，将多个PN液晶显示元件分成两组或更多组。 输出到一个组中包括的PN液晶显示元件的段电极的信号（SEG-A）的电平切换和输出到一个组的分段电极的信号（SEG-B）的电平切换 PN液晶显示元件作为输出到多个PN液晶显示元件的各个分段电极的每个信号在彼此不重叠的定时进行。

公开(公告)号：US4653099A

公开(公告)日：1987-03-24

申请号：US489596

申请日：1983-04-28

申请人： Takao Kanke ,  Susumu Takashima ,  Naoki Inagaki

发明人： Takao Kanke ,  Susumu Takashima ,  Naoki Inagaki

IPC分类号： G10L13/02 ,  G10L13/04 ,  G01L5/00

CPC分类号： G10L13/04 ,  G10L25/24

摘要： In an LSP sound synthesizer, LSP transform parameters for three types of sounds are prestored: human, bird, and insect. For synthesis, the inverse transform is modified to increase the quality of each type of sound: a parameter converter uses a uniform-frequency distribution (of gain) for human, a mid-frequency concentration for bird, and a high-frequency concentration for insect sounds.

摘要翻译： 在LSP声音合成器中，预先存储了三种类型的声音的LSP变换参数：人类，鸟类和昆虫。 为了合成，对逆变换进行了修改，以提高每种声音的质量：参数转换器对人类使用均匀频率分布（增益），鸟的中频浓度和昆虫的高频浓度 声音

公开(公告)号：US4541111A

公开(公告)日：1985-09-10

申请号：US396140

申请日：1982-07-07

申请人： Susumu Takashima ,  Takao Kanke ,  Naoki Inagaki ,  Kazumasa Fukushima

发明人： Susumu Takashima ,  Takao Kanke ,  Naoki Inagaki ,  Kazumasa Fukushima

IPC分类号： G10L11/00 ,  G10L19/06 ,  G10L1/00

CPC分类号： G10L19/07

摘要： An LSP synthesizer (Line Spectrum Pair) includes an LSP voice synthesizer digital filter arranged for parallel operation upon voice parameters and excitation information, to obtain an LSP synthesized sound. The LSP voice synthesizer digital filter includes at least a parallel multiplier and a parallel adder. The parallel multiplier divides data into a set of upper bits and a set of lower bits and multiplies the upper and lower bits separately at specified different timings. The multiplication results are supplied to a delay circuit which adjusts timings of the multiplication results. These multiplication results are synthesized by the parallel adder to obtain a single piece of data.

摘要翻译： LSP合成器（Line Spectrum Pair）包括LSP语音合成器数字滤波器，用于对语音参数和激励信息进行并行操作，以获得LSP合成声音。 LSP语音合成器数字滤波器至少包括并行乘法器和并行加法器。 并行乘法器将数据划分成一组高位和一组较低位，并以指定的不同定时将高位和低位相乘。 乘法结果被提供给调整乘法结果的定时的延迟电路。 这些乘法结果由并行加法器合成，以获得单个数据。