摘要:
A method of detecting an error when loading a programmable integrated circuit (IC) can include detecting a predetermined bit pattern indicating a start of a bitstream within the programmable IC, starting a timer within the programmable IC responsive to detecting the predetermined bit pattern, and determining whether a bitstream load complete condition has occurred prior to expiration of the timer. When the timer expires prior to an occurrence of the bitstream load complete condition, at least one recovery action can be implemented.
摘要:
A cycle basis is efficiently determined for a directed graph. A first depth-first search of the directed graph classifies each of the edges of the directed graph to have a type that is one of a within-tree type for an edge within a tree of the first depth first search, a forward type for an edge skipping forward along the tree, a back type for an edge directed back along the tree, or a cross type for an edge between two subtrees of the tree. A second depth-first search of the directed graph determines a respective cycle for each of the edges of the back type. A third depth-first search of the directed graph determines a respective cycle for each of the edges of the cross type that is included a cycle. The basis is output the basis that specifies each of the respective cycles.
摘要:
A software architecture for facilitating communications between a computer or workstation and a programming apparatus used to program a PLD by minimizing the number of two-way communications on a standard download cable (e.g., RS232, USB) connected between the computer and the programming apparatus. A first component used to encode programming instructions and configuration data to form a first transmission stream that is transmitted to the programming apparatus in a single, long burst. The programming apparatus includes a second component of the software architecture that interprets the first transmission stream and programs the PLD using, for example, Boundary-Scan signals that are generated in response to the programming instructions and configuration data. A buffer memory stores data shifted out of the PLD during the programming operation, which is transmitted to the computer in a single, long burst after the first transmission stream is completed.
摘要:
In an automated control system, a user must be authorized to modify the configuration data of a programmable logic device (PLD). After authorization is confirmed, the PLD is unlocked. Then, the configuration data of the PLD and the contents of a version control register are read back and archived, thereby providing a security back-up should the user need to retrieve the original data. After readback, the version control number is automatically incremented. This incremented version control number and the modified configuration data provided by the user are downloaded to the PLD. Finally, the PLD is locked.
摘要:
Methods and systems are provided for determining a total length of instruction registers. A data shift of a scan chain determines whether each device in the scan chain is an identified device. An overall length of the instruction registers of the devices is determined from an instruction shift. An actual position is determined for an identified device between each pair of sub-sequences of unidentified devices. An instruction shift of the scan chain attempts to set the respective instruction register of the identified device using one or more trial positions. If a data shift of the scan chain obtains the recognized value of the respective identification register of the identified device for one of the trial positions, then this trial position is the actual position within the overall length. The total length is determined for the instruction registers of the unidentified devices in each sub-sequence of the unidentified devices.
摘要:
Monitoring of the state vector of a test access port (TAP) permits isolation of the root cause of improper transitions of the state vector due to various factors, including electrical noise. The test access port includes TCK, TMS, TDI, and TDO. A circuit for monitoring the state vector includes a TAP controller, a storage circuit, and a sampling circuit. The TAP controller updates the state vector for each transition of TCK. The storage circuit stores a value of the state vector responsive to transitions of TCK while a write enable is enabled. To permit generating the write enable without additional pins and without violating a protocol for the test access port, the write enable may be generated in response to a plurality of transitions of TDI of the test access port during an interval in which TMS and TCK of the test access port have no transitions.
摘要:
A system and method for diagnosing an electronic device remotely using a network is provided. The electronic device includes one or more programmable logic devices that are configurable. A diagnostic microcontroller functions to communicate to the programmable logic devices and to communicate to the network. To diagnose the electronic device, communication is established to the network and to a diagnostic/repair center. The diagnostic/repair center selects diagnostic commands and transmits them to the electronic device. The diagnostic microcontroller initiates the diagnostic commands on the one or more programmable logic devices to test their configuration and/or functionality. Test results are collected and transmitted back to the diagnostic/repair center for analysis. Based on the analysis, if appropriate, reconfiguration commands are sent to reconfigure the programmable logic device to correct identified errors.
摘要:
A system and method for allocating resources of programmable logic devices (PLDs) according to activity level. In various embodiments, the activity levels of functions implemented on the PLDs are monitored. When decreasing and/or increasing activity levels are detected, the PLD resources are reallocated between the various functions in proportion to the decreasing and/or increasing activity levels.
摘要:
A method for programming a series of in-system programmable devices that uses Boundary-Scan techniques to read device identification codes from each device of a system, and to automatically generate a board/device information file including a record for each device arranged in the order in which the devices are chained in the system. The device identification codes are then used to automatically retrieve device specifications from a central database. When no identification code is provided from the device, or the database fails to include specifications for a particular device, the user is prompted to enter minimum information or specifications necessary to carry out communications with the device. After device specifications are entered for each device, the user is prompted to enter configuration data, which is automatically matched to its associated device, and compared for consistency with the device specifications. After verifying the configuration data, programming is performed using the configuration data.
摘要:
A method and apparatus are disclosed for reducing the likelihood of unintentionally or irreversibly activating one or more of a programmable logic device's output elements after a programming interruption. Output disable and enable bits are moved to near the beginning and end, respectively, of a programming bitstream, thereby maximizing the amount of time the device outputs are in high impedance mode during programming, and minimizing the risk of unintentionally driving the device outputs.