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    Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation
    2.
    发明授权
    Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation 有权

    公开(公告)号：US10547514B2

    公开(公告)日：2020-01-28

    申请号：US15923519

    申请日：2018-03-16

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant Rao ,  Sailesh Kumar ,  Pier Giorgio Raponi

    IPC分类号： H04L12/24 ,  H04L12/933

    摘要： A system and method for automatic crossbar generation and router connections for Network-on-Chip (NoC) topology generation is disclosed. Aspects of the present disclosure relate to methods, systems, and computer readable mediums for generating topology for a given SoC by significantly improving system efficiency by accurately indicating the best possible positions and configurations for hosts and ports within the hosts, along with indicating system level routes to be taken for traffic flows using the NoC interconnect architecture. Aspects of the present disclosure further relate to determining optimal positions of ports within hosts so as to enable low latency and higher message transmission efficiency between the hosts. In yet another aspect, a computationally efficient NoC topology is generated based on allocation of routers and NoC channels so as to identify most efficient routes for various system flows between hosts.

    SYSTEM ON CHIP (SOC) BUILDER
    3.
    发明申请
    SYSTEM ON CHIP (SOC) BUILDER 审中-公开

    公开(公告)号：US20190266307A1

    公开(公告)日：2019-08-29

    申请号：US16258149

    申请日：2019-01-25

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant RAO ,  Sailesh KUMAR ,  Pier Giorgio RAPONI

    IPC分类号： G06F17/50 ,  H01L23/31

    摘要： Methods and example implementations described herein are generally directed to a System on Chip (SoC) design and verification system and method that constructs SoC from functional building blocks circuits while concurrently taking into account numerous chip level design aspects along with the generation of a simulation environment for design verification. An aspect of the present disclosure relates to a method for generating a System on Chip (SoC) from a floor plan having one or more integration descriptions. The method includes the steps of generating one or more connections between the integration descriptions of the floor plan based at least on a traffic specification, and conducting a design check process on the floor plan. If the design check process on the floor plan is indicative of passing the design check process, then the method generates the SoC according to the one or more connections generated between the integration descriptions.

    REPOSITORY OF INTEGRATION DESCRIPTION OF HARDWARE INTELLECTUAL PROPERTY FOR NOC CONSTRUCTION AND SOC INTEGRATION
    4.
    发明申请
    REPOSITORY OF INTEGRATION DESCRIPTION OF HARDWARE INTELLECTUAL PROPERTY FOR NOC CONSTRUCTION AND SOC INTEGRATION 审中-公开

    公开(公告)号：US20190259113A1

    公开(公告)日：2019-08-22

    申请号：US16119474

    申请日：2018-08-31

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant RAO ,  Sailesh KUMAR ,  Pier Giorgio RAPONI

    IPC分类号： G06Q50/18 ,  G06F17/30

    摘要： Methods and example implementations described herein are generally directed to repository of integration description of hardware intellectual property (IP) for NoC construction and SoC integration. An aspect of the present disclosure relates to a method for managing a repository of hardware intellectual property (IP) for Network-on-Chip (NoC)/System-on-Chip (SoC) construction. The method includes the steps of storing one or more integration descriptions of the hardware IP in the repository, selecting at least one integration description as a parsed selection from said one or more integration descriptions of the hardware IP for incorporation in the NoC/SoC, and generating the NoC/SoC at least from the parsed selection.

    System and method for network on chip construction through machine learning
    6.
    发明授权
    System and method for network on chip construction through machine learning 有权

    公开(公告)号：US10313269B2

    公开(公告)日：2019-06-04

    申请号：US15390705

    申请日：2016-12-26

    申请人： NetSpeed Systems, Inc.

    发明人： Pier Giorgio Raponi

    IPC分类号： G06F15/173 ,  H04L12/933 ,  G06N20/00 ,  H04L12/937

    摘要： In example implementations, the specification is processed to determine the characteristics of the NoC to be generated, the characteristics of the flow (e.g. number of hops, bandwidth requirements, type of flow such as request/response, etc.), flow mapping decision strategy (e.g., limit on number of new virtual channels to be constructed, using of existing VCs, yx/xy mapping), and desired strategy to be used for how the flows are to be mapped to the network. In such processing, the machine learning algorithm can provide a determination as to if a flow is acceptable or not in view of the specification (e.g., via a Q score). In example implementations, the machine learning decisions can be applied on a flow by flow basis, and can involve supervised learning and unsupervised learning algorithms.

    Systems and Methods for NoC Construction
    9.
    发明申请
    Systems and Methods for NoC Construction 审中-公开

    公开(公告)号：US20180227215A1

    公开(公告)日：2018-08-09

    申请号：US15425919

    申请日：2017-02-06

    申请人： NetSpeed Systems, Inc.

    发明人： Pier Giorgio RAPONI ,  Sailesh KUMAR ,  Nishant RAO

    IPC分类号： H04L12/721 ,  G06N99/00

    CPC分类号： H04L45/12 ,  G06N99/005 ,  H04L45/38 ,  H04L49/109

    摘要： Example implementations described herein are directed to systems and methods for generating a Network on Chip (NoC), which can involve determining a plurality of traffic flows from a NoC specification; grouping the plurality of traffic flows into a plurality of groups; utilizing a first machine learning algorithm to determine a sorting order on each of the plurality of groups of traffic flows; generating a list of traffic flows for NoC construction from the plurality of groups of traffic flows based on the sorting order; utilizing a second machine learning algorithm to select one or more mapping algorithms for each group of the plurality of groups of traffic flows for NoC construction; and generating the NoC based on a mapping from the selection of the one or more mapping algorithms.

    Strategies for NoC Construction Using Machine Learning
    10.
    发明申请
    Strategies for NoC Construction Using Machine Learning 审中-公开

    公开(公告)号：US20180198682A1

    公开(公告)日：2018-07-12

    申请号：US15403162

    申请日：2017-01-10

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant RAO ,  Pier Giorgio RAPONI ,  Sailesh KUMAR

    IPC分类号： H04L12/24 ,  G06N99/00 ,  H04L12/933

    CPC分类号： H04L49/109 ,  G06N20/00 ,  H04L41/145 ,  H04L41/16 ,  H04L49/205

    摘要： Aspects of the present disclosure relate to methods, systems, and computer readable mediums for generating/constructing NoC based on one or more strategies that are selected by a machine-learning engine (MLE) from a plurality of available strategies based on an input NoC specification. In an aspect, the method can include the steps of processing a Network on Chip (NoC) specification through a process to generate a vector for a plurality of NoC generation strategies, wherein the vector is indicative of which strategies from the plurality of NoC generation strategies are to be used to generate the NoC to meet a quality metric; and generating the NoC by using the strategies from the plurality of NoC generation strategies indicated by the vector as the strategies to be used to generate the NoC, wherein the process is generated through a machine learning process that is trained for the plurality of NoC generation strategies.