公开(公告)号：US09928204B2

公开(公告)日：2018-03-27

申请号：US14620642

申请日：2015-02-12

申请人： NetSpeed Systems

发明人： Eric Norige ,  Sailesh Kumar

IPC分类号： G06F13/12 ,  G06F13/42 ,  H04L12/721

CPC分类号： G06F13/4221 ,  H04L45/40

摘要： Methods and example implementations described herein are generally directed to interconnect architecture, and more specifically, to generation of one or more expanded transactions for conducting simulations and/or NoC design. Aspects of the present disclosure include processing of input traffic specification that is given in terms of groups of hosts, requests, and responses to the requests, in order to generate one or more appropriate/correct expanded transactions that can be simulated.

公开(公告)号：US09774498B2

公开(公告)日：2017-09-26

申请号：US14750096

申请日：2015-06-25

申请人： NetSpeed Systems

发明人： Sailesh Kumar ,  Eric Norige ,  Joji Philip ,  Mahmud Hassan ,  Sundari Mitra ,  Joseph Rowlands

IPC分类号： H04L12/715 ,  H04L12/24 ,  H04L12/775

CPC分类号： H04L41/0803 ,  G06F15/7825 ,  H04L45/04 ,  H04L45/58

摘要： A network-on-chip configuration includes a first plurality of cores arranged in a two-dimensional mesh; a first plurality of routers, each of the first plurality of routers associated with a corresponding local one of the first plurality of cores, each of the first plurality of routers having a plurality of directional ports configured to provide connections to other ones of the first plurality of routers; a second plurality of cores disposed around a periphery of the two-dimensional mesh arrangement; and a second plurality of routers, each of the second plurality of routers associated with a corresponding local one of the second plurality of cores, and having a directional port configured to provide a connection to a neighboring one of the first plurality of routers.

公开(公告)号：US09473388B2

公开(公告)日：2016-10-18

申请号：US13961705

申请日：2013-08-07

申请人： NetSpeed Systems

发明人： Sailesh Kumar ,  Eric Norige ,  Joe Rowlands ,  Joji Philip

IPC分类号： H04L12/761 ,  H04L12/705 ,  H04L12/753 ,  H04L12/933

CPC分类号： H04L12/1886 ,  H04L12/185 ,  H04L41/0823 ,  H04L41/0896 ,  H04L45/16 ,  H04L45/18 ,  H04L45/48 ,  H04L47/31 ,  H04L49/109

摘要： Example implementations are directed to more efficiently delivering a multicast message to multiple destination components from a source component. Multicast environment is achieved with transmission of a single message from a source component, which gets replicated in the NoC during routing towards the destination components indicated in the message. Example implementations further relate to an efficient way of implementing multicast in any given NoC topology, wherein one or more multicast trees in the given NoC topology are formed and one of these trees are used for routing a multicast message to its intended destination components mentioned therein.

摘要翻译： 示例性实现旨在从源组件更有效地将多播消息传递到多个目的地组件。 通过从源组件传输单个消息来实现组播环境，该组件在路由期间在NoC中被复制到消息中指示的目的地组件。 示例实现还涉及在任何给定的NoC拓扑中实现多播的有效方式，其中形成给定NoC拓扑中的一个或多个多播树，并且使用这些树中的一个将多播消息路由到其中提到的预期目的地组件。

公开(公告)号：US09471726B2

公开(公告)日：2016-10-18

申请号：US13951098

申请日：2013-07-25

申请人： NETSPEED SYSTEMS

发明人： Sailesh Kumar ,  Amit Patankar ,  Eric Norige

IPC分类号： G06F17/50 ,  G06F15/78

CPC分类号： G06F17/5022 ,  G06F15/7807 ,  G06F17/5009

摘要： Systems and methods for performing multi-message transaction based performance simulations of SoC IP cores within a Network on Chip (NoC) interconnect architecture by accurately imitating full SoC behavior are described. The example implementations involve simulations to evaluate and detect NoC behavior based on execution of multiple transactions at different rates/times/intervals, wherein each transaction can contain one or more messages, with each message being associated with a source agent and a destination agent. Each message can also be associated with multiple parameters such as rate, size, value, latency, among other like parameters that can be configured to indicate the execution of the transaction by a simulator to simulate a real-time scenario for generating performance reports for the NoC interconnect.

摘要翻译： 描述了通过精确模拟完整的SoC行为来执行基于片上（InC）互连架构的SoC IP内核的基于多消息交易的性能模拟的系统和方法。 示例实现涉及以不同速率/次/间隔执行多个事务来评估和检测NoC行为的模拟，其中每个事务可以包含一个或多个消息，每个消息与源代理和目的地代理相关联。 每个消息还可以与诸如速率，大小，值，延迟等多个参数相关联，以及可以被配置为指示模拟器执行交易的其他类似参数，以模拟实时场景，以生成针对 NoC互连

公开(公告)号：US20150288596A1

公开(公告)日：2015-10-08

申请号：US14246940

申请日：2014-04-07

申请人： NetSpeed Systems

发明人： Sailesh Kumar ,  Eric Norige ,  Pier Giorgio Raponi

IPC分类号： H04L12/727 ,  H04L12/733

CPC分类号： H04L45/121 ,  H04L45/126 ,  H04L49/109

摘要： The present disclosure is directed to systems and methods for connecting hosts to any router by the use of bridges. Example implementations described herein are directed to determining connections between routers and hosts based on the topology of the NoC and cost functions. Unused routers may also be removed from the NoC configuration and unused directional host ports of routers may be utilized to connect hosts together depending on a cost function and the desired implementation.

摘要翻译： 本公开涉及通过使用网桥将主机连接到任何路由器的系统和方法。 本文描述的示例性实现旨在基于NoC和成本函数的拓扑来确定路由器和主机之间的连接。 未使用的路由器也可以从NoC配置中移除，并且根据成本函数和期望的实现，可以利用路由器的未使用的定向主机端口来连接主机。

公开(公告)号：US10355996B2

公开(公告)日：2019-07-16

申请号：US14519639

申请日：2014-10-21

申请人： NetSpeed Systems

发明人： Sailesh Kumar ,  Joji Philip ,  Eric Norige ,  Sundari Mitra

IPC分类号： H04L12/26 ,  H04L12/803 ,  H04L12/933

摘要： Systems and methods involving construction of a system interconnect in which different channels have different widths in numbers of bits. Example processes to construct such a heterogeneous channel NoC interconnect are disclosed herein, wherein the channel width may be determined based upon the provided specification of bandwidth and latency between various components of the system.

公开(公告)号：US09864728B2

公开(公告)日：2018-01-09

申请号：US14726289

申请日：2015-05-29

申请人： NetSpeed Systems

发明人： Eric Norige ,  Sailesh Kumar

IPC分类号： G06F15/17 ,  G06F15/78 ,  H04L12/933

CPC分类号： G06F15/7825 ,  H04L49/109

摘要： Aspects of the present disclosure provide systems and methods for automatic generation of physically aware aggregation/distribution networks that enable optimized arrangement of a plurality of hardware elements, and provide positions and connectivity for one or more intermediate hardware elements. One or more intermediate hardware elements can be configured to aggregate signals/commands/messages/data from their corresponding hardware elements or from other intermediate hardware elements, and send the aggregated signals/commands/messages/data to a root hardware element that acts as a communication interface for the network. The intermediate hardware elements can also be configured to segregate/distribute signals/commands/message received from the root hardware element to a plurality of specified hardware elements and/or intermediate hardware elements.

公开(公告)号：US09054977B2

公开(公告)日：2015-06-09

申请号：US13959541

申请日：2013-08-05

申请人： NETSPEED SYSTEMS

发明人： Sailesh Kumar ,  Amit Patankar ,  Eric Norige

IPC分类号： H04L12/24 ,  H04L12/931

CPC分类号： H04L41/12 ,  H04L41/0823 ,  H04L41/0826 ,  H04L45/06 ,  H04L45/12 ,  H04L45/38 ,  H04L49/00

摘要： Example implementations described herein are directed to automatically determine an optimal NoC topology using heuristic based optimizations. First, an optimal orientation of ports of various hosts is determined based on the system traffic and connectivity specification. Second, the NoC routers to which the host's port are directly connected to are determined in the NoC layout. Third, an optimal set of routes are computed for the system traffic and the required routers and channels along the routes are allocated forming the full NoC topology. The three techniques can be applied in any combination to determine NoC topology, host port orientation, and router connectivity that reduces load on various NoC channels and improves latency, performance, and message transmission efficiency between the hosts.

摘要翻译： 本文描述的示例实现旨在使用基于启发式的优化来自动确定最佳的NoC拓扑。 首先，基于系统流量和连通性规范，确定各种主机端口的最佳方向。 其次，主机端口直接连接的NoC路由器在NoC布局中确定。 第三，为系统流量计算一组最优路由，分配沿着路由的所需路由器和信道，形成完整的NoC拓扑。 这三种技术可以任意组合应用，以确定NoC拓扑，主机端口定向和路由器连接，减少各种NoC信道的负载，并提高主机之间的延迟，性能和消息传输效率。

公开(公告)号：US08934377B2

公开(公告)日：2015-01-13

申请号：US13794273

申请日：2013-03-11

申请人： NetSpeed Systems

发明人： Sailesh Kumar ,  Eric Norige

IPC分类号： H04L12/28 ,  H04L12/851

CPC分类号： H04L47/2425 ,  H04L47/2408

摘要： Systems and methods described herein are directed to solutions for Network on Chip (NoC) interconnects that supports reconfigurability to support a variety of different traffic profiles each having different sets of traffic flows after the NoC is designed and deployed in a SoC. Reconfiguration of the NoC to map and load a new traffic profile or change the currently mapped traffic profile is performed by an external optimization module which maps various transactions of a given traffic profile to the NoC and reconfigure the NoC hardware by loading the computed mapping information. As part of the mapping process, load balancing between NoC layers may be performed by automatically assigning the transactions in the traffic profile to be routed over certain NoC layers and channels, automatically determining the routes based on the bandwidth requirements of the transaction. The deadlock avoidance and isolation properties of various transactions are maintained during the mapping.

摘要翻译： 本文描述的系统和方法涉及在芯片（NoC）互连上的解决方案，其支持可重新配置以支持在NoC被设计和部署在SoC之后具有不同组的业务流的各种不同流量简档。 重新配置NoC以映射和加载新的流量简档或更改当前映射的流量简档由外部优化模块执行，外部优化模块将给定流量简档的各种事务映射到NoC，并通过加载计算的映射信息重新配置NoC硬件。 作为映射过程的一部分，NoC层之间的负载平衡可以通过自动分配流量简档中的事务来执行，以便通过某些NoC层和通道进行路由，根据事务的带宽要求自动确定路由。 在映射期间维护各种事务的死锁避免和隔离属性。

公开(公告)号：US10469337B2

公开(公告)日：2019-11-05

申请号：US15885297

申请日：2018-01-31

申请人： NetSpeed Systems, Inc.

发明人： William John Bainbridge ,  Eric Norige ,  Sailesh Kumar ,  Nishant Rao

IPC分类号： H04L12/24 ,  G06F15/78 ,  G06N20/00 ,  H04L12/721 ,  H04L12/729 ,  G06F17/50

摘要： Example implementations as described herein are directed to systems and methods for processing a NoC specification for a plurality of performance requirements of a NoC, and generating a plurality of NoCs, each of the plurality of NoCs meeting a first subset of the plurality of performance requirements. For each of the plurality of NoCs, the example implementations involve presenting a difference between an actual performance of the each of the plurality of NoCs and each performance requirement of a second subset of the plurality of performance requirements and one or more costs for each of the plurality of NoCs.