公开(公告)号：US20090043932A1

公开(公告)日：2009-02-12

申请号：US11837171

申请日：2007-08-10

申请人： Oreste Bernardi

发明人： Oreste Bernardi

IPC分类号： G06F13/00

CPC分类号： G11C8/12 ,  G11C5/04 ,  G11C16/08 ,  G11C2029/4402

摘要： An embodiment of the invention describes a method for enumeration. The method includes assigning a second number to a device of a plurality of devices, wherein each device of the plurality of devices has a different unique first number. The method includes comparing at least portions of the first numbers and assigning a second number to one of the plurality of devices depending on the result of the comparison.

摘要翻译： 本发明的实施例描述了一种枚举方法。 该方法包括将第二数量分配给多个设备的设备，其中多个设备中的每个设备具有不同的唯一的第一个号码。 该方法包括根据比较结果比较第一数字的至少部分和将多个设备中的一个分配给第二个数字。

公开(公告)号：US07149844B2

公开(公告)日：2006-12-12

申请号：US10390556

申请日：2003-03-14

申请人： Oreste Bernardi ,  Marco Redaelli ,  Corrado Villa

发明人： Oreste Bernardi ,  Marco Redaelli ,  Corrado Villa

IPC分类号： G06F12/00

CPC分类号： G11C16/10 ,  G11C2216/20 ,  G11C2216/22

摘要： A non-volatile memory device is proposed. The non-volatile memory device includes a flash memory and means for executing external commands, the external commands including a first subset of commands for accessing the flash memory directly; the memory device further includes a programmable logic unit and means for storing program code for the logic unit, the external commands including a second subset of at least one command for causing the logic unit to process information stored in at least one portion of the flash memory under the control of the program code.

公开(公告)号：US06538267B2

公开(公告)日：2003-03-25

申请号：US09972169

申请日：2001-10-03

申请人： Matteo Bordogna ,  Enrico Laurin ,  Oreste Bernardi

发明人： Matteo Bordogna ,  Enrico Laurin ,  Oreste Bernardi

IPC分类号： H01L31072

CPC分类号： H01L27/14692 ,  H01L27/14647

摘要： The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including, implanting active areas on a semiconductor substrate to obtain a first integrated region of a corresponding photosensor; and forming a stack of layers having different thickness and refractive index layers over the photosensor to provide interferential filters for the same photosensor. At least one of the above mentioned layers is formed by a transparent metallic oxide having a high refraction index and a corresponding high dielectric constant. In this manner, due to the transparency of the high refraction index material, the design of interferential resonators is rendered more flexible making possible the use of a stack of layers including more than one high refraction index layer.

摘要翻译： 本发明涉及一种在标准CMOS工艺中制造光传感器装置的方法，包括：在半导体衬底上注入有源区域，以获得相应的光电传感器的第一整合区域; 并且在光传感器上形成具有不同厚度和折射率层的层叠，以为同一光电传感器提供干涉滤光片。 上述层中的至少一层由具有高折射率和相应的高介电常数的透明金属氧化物形成。 以这种方式，由于高折射率材料的透明度，干涉谐振器的设计变得更加灵活，使得可能使用包括多于一个高折射率层的层叠。

公开(公告)号：US08243516B2

公开(公告)日：2012-08-14

申请号：US12052414

申请日：2008-03-20

申请人： Marco Redaelli ,  Oreste Bernardi

发明人： Marco Redaelli ,  Oreste Bernardi

IPC分类号： G11C11/34

CPC分类号： G11C16/06 ,  G11C7/10

摘要： A NAND-type flash memory device is described. In some embodiments, the memory device includes NAND-type flash memory cells, and a synchronous NAND interface. The synchronous NAND interface includes a standard NAND flash interface pin arrangement and a clock (CLK) pin. The synchronous NAND interface is configured to interface with a NOR-compatible memory interface.

摘要翻译： 描述NAND型闪速存储器件。 在一些实施例中，存储器件包括NAND型闪存单元和同步NAND接口。 同步NAND接口包括标准NAND闪存接口引脚布置和时钟（CLK）引脚。 同步NAND接口被配置为与NOR兼容的存储器接口进行接口。

公开(公告)号：US20120110374A1

公开(公告)日：2012-05-03

申请号：US12915396

申请日：2010-10-29

申请人： Simon Brewerton ,  Patrick Leteinturier ,  Oreste Bernardi ,  Antonio Vilela ,  Klaus Scheibert ,  Jens Barrenscheen

发明人： Simon Brewerton ,  Patrick Leteinturier ,  Oreste Bernardi ,  Antonio Vilela ,  Klaus Scheibert ,  Jens Barrenscheen

IPC分类号： G06F11/34

CPC分类号： G06F11/263 ,  G06F11/0739 ,  G06F11/0754 ,  G06F11/3013 ,  G06F11/3068

摘要： Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.

摘要翻译： 本发明的一些实施例涉及一种嵌入式处理系统。 该系统包括用于存储多个操作指令的存储器单元和耦合到存储器单元的处理单元。 处理单元可以执行与各个操作指令相对应的逻辑操作。 输入/输出（I / O）接口接收第一时变波形并提供基于第一时变波形的I / O信号。 比较单元，耦合到所述处理单元，并且适于基于所述I / O信号是否与参考信号具有预定关系来选择性地确定错误信号，其中所述预定关系在正常操作期间成立，但是当意外 事件发生并导致至少一个I / O信号和参考信号的意外变化。

公开(公告)号：US07831742B2

公开(公告)日：2010-11-09

申请号：US11837171

申请日：2007-08-10

申请人： Oreste Bernardi

发明人： Oreste Bernardi

IPC分类号： G06F3/00 ,  G06F13/12

CPC分类号： G11C8/12 ,  G11C5/04 ,  G11C16/08 ,  G11C2029/4402

摘要： An embodiment of the invention describes a method for enumeration. The method includes assigning a second number to a device of a plurality of devices, wherein each device of the plurality of devices has a different unique first number. The method includes comparing at least portions of the first numbers and assigning a second number to one of the plurality of devices depending on the result of the comparison.

摘要翻译： 本发明的实施例描述了一种枚举方法。 该方法包括将第二数量分配给多个设备的设备，其中多个设备中的每个设备具有不同的唯一的第一个号码。 该方法包括根据比较结果比较第一数字的至少部分和将多个设备中的一个分配给第二个数字。

公开(公告)号：US06352876B1

公开(公告)日：2002-03-05

申请号：US09626836

申请日：2000-07-27

申请人： Matteo Bordogna ,  Enrico Laurin ,  Oreste Bernardi

发明人： Matteo Bordogna ,  Enrico Laurin ,  Oreste Bernardi

IPC分类号： H01L2100

CPC分类号： H01L27/14692 ,  H01L27/14647

摘要： The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including, implanting active areas on a semiconductor substrate to obtain a first integrated region of a corresponding photosensor; and forming a stack of layers having different thickness and refractive index layers over the photosensor to provide interferential filters for the same photosensor. At least one of the above mentioned layers is formed by a transparent metallic oxide having a high refraction index and a corresponding high dielectric constant. In this manner, due to the transparency of the high refraction index material, the design of interferential resonators is rendered more flexible making possible the use of a stack of layers including more than one high refraction index layer.

公开(公告)号：US08539278B2

公开(公告)日：2013-09-17

申请号：US12915396

申请日：2010-10-29

申请人： Simon Brewerton ,  Patrick Leteinturier ,  Oreste Bernardi ,  Antonio Vilela ,  Klaus Scheibert ,  Jens Barrenscheen

发明人： Simon Brewerton ,  Patrick Leteinturier ,  Oreste Bernardi ,  Antonio Vilela ,  Klaus Scheibert ,  Jens Barrenscheen

IPC分类号： G06F11/00

CPC分类号： G06F11/263 ,  G06F11/0739 ,  G06F11/0754 ,  G06F11/3013 ,  G06F11/3068

摘要： Some embodiments of the invention relate to an embedded processing system. The system includes a memory unit to store a plurality of operating instructions and a processing unit coupled to the memory unit. The processing unit can execute logical operations corresponding to respective operating instructions. An input/output (I/O) interface receives a first time-varying waveform and provides an I/O signal that is based on the first time-varying waveform. A comparison unit coupled to the processing unit and adapted to selectively assert an error signal based on whether the I/O signal has a predetermined relationship with a reference signal, wherein the predetermined relationship holds true during normal operation but fails to hold true when an unexpected event occurs and causes an unexpected change at least one of the I/O signal and reference signal.

摘要翻译： 本发明的一些实施例涉及一种嵌入式处理系统。 该系统包括用于存储多个操作指令的存储器单元和耦合到存储器单元的处理单元。 处理单元可以执行与各个操作指令相对应的逻辑操作。 输入/输出（I / O）接口接收第一时变波形并提供基于第一时变波形的I / O信号。 比较单元，耦合到所述处理单元，并且适于基于所述I / O信号是否与参考信号具有预定关系来选择性地确定错误信号，其中所述预定关系在正常操作期间成立，但是当意外 事件发生并导致至少一个I / O信号和参考信号的意外变化。

公开(公告)号：US20090238001A1

公开(公告)日：2009-09-24

申请号：US12052414

申请日：2008-03-20

申请人： Marco Redaelli ,  Oreste Bernardi

发明人： Marco Redaelli ,  Oreste Bernardi

IPC分类号： G11C11/34

CPC分类号： G11C16/06 ,  G11C7/10

摘要： A NAND-type flash memory device is described. In some embodiments, the memory device includes NAND-type flash memory cells, and a synchronous NAND interface. The synchronous NAND interface includes a standard NAND flash interface pin arrangement and a clock (CLK) pin. The synchronous NAND interface is configured to interface with a NOR-compatible memory interface.

摘要翻译： 描述NAND型闪速存储器件。 在一些实施例中，存储器件包括NAND型闪存单元和同步NAND接口。 同步NAND接口包括标准NAND闪存接口引脚布置和时钟（CLK）引脚。 同步NAND接口被配置为与NOR兼容的存储器接口进行接口。

公开(公告)号：US06830951B2

公开(公告)日：2004-12-14

申请号：US10252952

申请日：2002-09-23

申请人： Enrico Laurin ,  Matteo Bordogna ,  Oreste Bernardi

发明人： Enrico Laurin ,  Matteo Bordogna ,  Oreste Bernardi

IPC分类号： H01L2100

CPC分类号： H01L27/14685 ,  H01L27/14621

摘要： The invention relates to a process for manufacturing a light sensor device in a standard CMOS process, including at least the following phases: implanting active areas on a semiconductor substrate to obtain at least a first, a second and a third integrated region of corresponding photosensors; forming a stack of layers of different thickness and refractive index layers over the photosensors to provide an interferential filter for said photosensors. The stack is obtained by a deposition of a first oxide stack including a first, a second and a third oxide layer over at least one photosensor; moreover, this third oxide layer is obtained by a deposition step of an protecting undoped premetal dielectric layer.

摘要翻译： 本发明涉及一种用于制造标准CMOS工艺中的光传感器装置的方法，该方法至少包括以下阶段：在半导体衬底上注入有源区域以获得至少相应光电传感器的第一，第二和第三集成区域; 在光电传感器上形成不同厚度和折射率层的层叠，以为所述光电传感器提供干涉滤光片。 堆叠通过在至少一个光电传感器上沉积包括第一氧化物层，第二氧化物层和第三氧化物层的第一氧化物堆叠获得; 此外，该第三氧化物层通过保护性未掺杂的金属前介电层的沉积步骤获得。