公开(公告)号：US08338906B2

公开(公告)日：2012-12-25

申请号：US12329677

申请日：2008-12-08

申请人： Ping-Chun Yeh ,  Der-Chyang Yeh ,  Ruey-Hsin Liu ,  Mingo Liu

发明人： Ping-Chun Yeh ,  Der-Chyang Yeh ,  Ruey-Hsin Liu ,  Mingo Liu

IPC分类号： H01L29/66

CPC分类号： H01L27/0814 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/872

摘要： An integrated circuit structure has a metal silicide layer formed on an n-type well region, a p-type guard ring formed on the n-type well region and encircling the metal silicide layer. The outer portion of the metal silicide layer extends to overlap the inner edge of the guard ring, and a Schottky barrier is formed at the junction of the internal portion of the metal silicide layer and the well region. A conductive contact is in contact with the internal portion and the outer portion of the metal silicide layer.

摘要翻译： 集成电路结构具有形成在n型阱区上的金属硅化物层，形成在n型阱区上并环绕金属硅化物层的p型保护环。 金属硅化物层的外部部分延伸成与保护环的内边缘重叠，并且在金属硅化物层的内部部分与阱区域的接合处形成肖特基势垒。 导电接触件与金属硅化物层的内部部分和外部部分接触。

公开(公告)号：US08334579B2

公开(公告)日：2012-12-18

申请号：US12899904

申请日：2010-10-07

申请人： Ping Chun Yeh ,  Der-Chyang Yeh ,  Chih-Ping Chao

发明人： Ping Chun Yeh ,  Der-Chyang Yeh ,  Chih-Ping Chao

IPC分类号： H01L29/872

CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/6606 ,  H01L29/66143 ,  H01L29/66212

摘要： An integrated circuit device and method for fabricating the integrated circuit device is disclosed. The integrated circuit device includes a substrate, a diffusion source, and a lightly doped diffusion region in contact with a conductive layer. A junction of the lightly doped diffusion region with the conductive layer forms a Schottky region. An annealing process is performed to form the lightly doped diffusion region. The annealing process causes dopants from the diffusion source (for example, an n-well disposed in the substrate) of the integrated circuit device to diffuse into a region of the substrate, thereby forming the lightly doped diffusion region.

摘要翻译： 公开了一种用于制造集成电路器件的集成电路器件和方法。 集成电路器件包括衬底，扩散源和与导电层接触的轻掺杂扩散区域。 轻掺杂扩散区与导电层的结形成肖特基区。 进行退火处理以形成轻掺杂扩散区域。 退火处理使得集成电路器件的扩散源（例如，设置在衬底中的n阱）的掺杂剂扩散到衬底的区域中，从而形成轻掺杂扩散区域。

公开(公告)号：US20120086099A1

公开(公告)日：2012-04-12

申请号：US12899904

申请日：2010-10-07

申请人： Ping Chun Yeh ,  Der-Chyang Yeh ,  Chih-Ping Chao

发明人： Ping Chun Yeh ,  Der-Chyang Yeh ,  Chih-Ping Chao

IPC分类号： H01L29/872 ,  H01L21/04

CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/6606 ,  H01L29/66143 ,  H01L29/66212

摘要： An integrated circuit device and method for fabricating the integrated circuit device is disclosed. The integrated circuit device includes a substrate, a diffusion source, and a lightly doped diffusion region in contact with a conductive layer. A junction of the lightly doped diffusion region with the conductive layer forms a Schottky region. An annealing process is performed to form the lightly doped diffusion region. The annealing process causes dopants from the diffusion source (for example, an n-well disposed in the substrate) of the integrated circuit device to diffuse into a region of the substrate, thereby forming the lightly doped diffusion region.

摘要翻译： 公开了一种用于制造集成电路器件的集成电路器件和方法。 集成电路器件包括衬底，扩散源和与导电层接触的轻掺杂扩散区域。 轻掺杂扩散区与导电层的结形成肖特基区。 进行退火处理以形成轻掺杂扩散区域。 退火处理使得集成电路器件的扩散源（例如，设置在衬底中的n阱）的掺杂剂扩散到衬底的区域中，从而形成轻掺杂扩散区域。

公开(公告)号：US20090283841A1

公开(公告)日：2009-11-19

申请号：US12329677

申请日：2008-12-08

申请人： Ping-Chun Yeh ,  Der-Chyang Yeh ,  Ruey-Hsin Liu ,  Mingo Liu

发明人： Ping-Chun Yeh ,  Der-Chyang Yeh ,  Ruey-Hsin Liu ,  Mingo Liu

IPC分类号： H01L29/872 ,  H01L29/78 ,  H01L27/088

CPC分类号： H01L27/0814 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/872

摘要： An integrated circuit structure has a metal silicide layer formed on an n-type well region, a p-type guard ring formed on the n-type well region and encircling the metal silicide layer. The outer portion of the metal silicide layer extends to overlap the inner edge of the guard ring, and a Schottky barrier is formed at the junction of the internal portion of the metal silicide layer and the well region. A conductive contact is in contact with the internal portion and the outer portion of the metal silicide layer.

摘要翻译： 集成电路结构具有形成在n型阱区上的金属硅化物层，形成在n型阱区上并环绕金属硅化物层的p型保护环。 金属硅化物层的外部部分延伸成与保护环的内边缘重叠，并且在金属硅化物层的内部部分与阱区域的接合处形成肖特基势垒。 导电接触件与金属硅化物层的内部部分和外部部分接触。

公开(公告)号：US06859103B2

公开(公告)日：2005-02-22

申请号：US10646028

申请日：2003-08-22

申请人： Ping-chun Yeh

发明人： Ping-chun Yeh

IPC分类号： H03F1/30 ,  H03F1/32 ,  H03F3/191 ,  H03G3/10 ,  H03F3/04

CPC分类号： H03F3/191 ,  H03F1/302 ,  H03F1/32

摘要： A bias circuit is provided for improving linearity of a radio frequency power amplifier. The bias circuit includes a bias transistor having a collector, an emitter, and a base. The collector is connected to a DC voltage source, the emitter is connected to a radio frequency transistor, and the base is connected to a bias voltage source. A capacitor and an inductor are connected in series and are coupled either between the emitter of the bias transistor and ground or between the base of the bias transistor and ground, thereby constructing an LC series-connected resonator circuit. The LC series-connected resonator circuit directly conducts the part of the radio frequency input signal, which is coupled back to the bias transistor, into the ground, thereby improving linearity of the radio frequency power amplifier. Preferably, the LC series-connected resonator circuit is designed to have a resonant frequency, which is equal to a frequency of a second harmonic component of the radio frequency input signal.

摘要翻译： 提供了一种用于提高射频功率放大器的线性度的偏置电路。 偏置电路包括具有集电极，发射极和基极的偏置晶体管。 集电极连接到直流电压源，发射极连接到射频晶体管，基极连接到偏置电压源。 电容器和电感器串联连接，并且耦合在偏置晶体管的发射极和接地之间，或耦合在偏置晶体管的基极和接地之间，从而构成LC串联谐振电路。 LC串联谐振器电路直接将射频输入信号的一部分耦合回偏置晶体管，从而提高射频功率放大器的线性度。 优选地，LC串联谐振器电路被设计为具有等于射频输入信号的二次谐波分量的频率的谐振频率。