摘要:
Various embodiments are generally directed to an apparatus, method and other techniques to identify one or more display segments of a display panel, each display segment associated with one of a plurality of lanes of a main link coupled with the interface, independently control enabling and disabling of the display segments and associated lanes, and communicate information on each of the lanes of the main link associated with enabled display segments, and to withhold communicating information on each of the lanes of the main link associated disabled display segments.
摘要:
Micro LEDs may be placed on a substrate in regularly spaced rows with an empty row between at least two successive rows of micro LED. A micro solar cell may then be placed in the empty row.
摘要:
A semiconductor chip is described. The semiconductor chip includes a display controller having a driver. The display controller is configurable to select a first, a second, a third and a fourth different display interface. The driver is designed to drive respective signals for each of the first, second, third and fourth interfaces through a single output.
摘要:
By partitioning the source PHY of a physical layer interface, such as a DisplayPort interface, between multiple power domains, dynamic switching between various power modes with faster entry and exit latency can be achieved in some embodiments. In some embodiments, the scheme may be hardware initiated and autonomous in nature. A controller can switch the PHY in and out of the various power consumption modes, dependent on usage scenarios.
摘要:
An integrated circuit is described. The integrated circuit includes a display controller having a driver. The display controller is configurable to select two or more display interfaces. The driver is designed to drive respective signals for the two or more display interfaces through a single output.
摘要:
An adaptive impedance matching arrangement has an adaptive impedance circuit and a control circuit. The adaptive impedance circuit matches the impedance of a bus and is controlled according to control bits supplied by the control circuit. The control bits are updated according to a signal indicating the state of a queue maintaining transactions for the bus.