Controlling pit formation in a III-nitride device
    1.
    发明授权
    Controlling pit formation in a III-nitride device 有权
    控制III族氮化物器件中的凹坑形成

    公开(公告)号:US09012250B2

    公开(公告)日:2015-04-21

    申请号:US13448453

    申请日:2012-04-17

    摘要: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct contact with the InGaN layer. The pit-filling layer may fill in pits formed in the InGaN layer.

    摘要翻译: 一种器件包括:半导体结构,包括设置在n型区域和p型区域之间的III族氮化物发光层和设置在n型区域和p型区域之一内的多个层对。 每层对包括与InGaN层直接接触的InGaN层和凹坑填充层。 凹坑填充层可以填充形成在InGaN层中的凹坑。

    THERMOELECTRIC NANOWIRE COMPOSITES
    2.
    发明申请
    THERMOELECTRIC NANOWIRE COMPOSITES 审中-公开
    热电纳米复合材料

    公开(公告)号:US20080178921A1

    公开(公告)日:2008-07-31

    申请号:US11843609

    申请日:2007-08-22

    申请人: Qi Laura Ye

    发明人: Qi Laura Ye

    CPC分类号: H01L35/34 H01L35/32

    摘要: An MOCVD process provides aligned p- and n- type nanowire arrays which are then filled with p- and n-type thermoelectric films to form the respective p-leg and n-leg of a thermoelectric device. The thermoelectric nanowire synthesis process is integrated with a photolithographic microfabrication process. The locations of the p- and n-type nanowire micro arrays are defined by photolithography. Metal contact pads at the bottom and top of these nanowire arrays which link the p- and n-type nanowires in series are defined and aligned by photolithography.

    摘要翻译: MOCVD工艺提供对准的p型和n型纳米线阵列,然后用p型和n型热电膜填充以形成热电装置的相应的p型腿和n型腿。 热电纳米线合成工艺与光刻微加工过程相结合。 通过光刻法定义p型和n型纳米线微阵列的位置。 通过光刻法定义并排列将p型和n型纳米线串联连接的这些纳米线阵列的底部和顶部的金属接触焊盘。

    Controlling Pit Formation in a III-Nitride Device
    3.
    发明申请
    Controlling Pit Formation in a III-Nitride Device 有权
    控制III-氮化物装置中的坑形成

    公开(公告)号:US20120205691A1

    公开(公告)日:2012-08-16

    申请号:US13448453

    申请日:2012-04-17

    IPC分类号: H01L33/22 H01L33/32

    摘要: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct contact with the InGaN layer. The pit-filling layer may fill in pits formed in the InGaN layer.

    摘要翻译: 一种器件包括:半导体结构,包括设置在n型区域和p型区域之间的III族氮化物发光层和设置在n型区域和p型区域之一内的多个层对。 每层对包括与InGaN层直接接触的InGaN层和凹坑填充层。 凹坑填充层可以填充形成在InGaN层中的凹坑。

    Controlling pit formation in a III-nitride device
    4.
    发明授权
    Controlling pit formation in a III-nitride device 有权
    控制III族氮化物器件中的凹坑形成

    公开(公告)号:US08183577B2

    公开(公告)日:2012-05-22

    申请号:US12495258

    申请日:2009-06-30

    IPC分类号: H01L29/72

    摘要: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct contact with the InGaN layer. The pit-filling layer may fill in pits formed in the InGaN layer.

    摘要翻译: 一种器件包括:半导体结构,包括设置在n型区域和p型区域之间的III族氮化物发光层和设置在n型区域和p型区域之一内的多个层对。 每层对包括与InGaN层直接接触的InGaN层和凹坑填充层。 凹坑填充层可以填充形成在InGaN层中的凹坑。

    CONTROLLING PIT FORMATION IN A III-NITRIDE DEVICE
    5.
    发明申请
    CONTROLLING PIT FORMATION IN A III-NITRIDE DEVICE 有权
    控制三硝酸盐装置中的磷酸盐形成

    公开(公告)号:US20100327256A1

    公开(公告)日:2010-12-30

    申请号:US12495258

    申请日:2009-06-30

    IPC分类号: H01L33/00 H01L21/20

    摘要: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct contact with the InGaN layer. The pit-filling layer may fill in pits formed in the InGaN layer.

    摘要翻译: 一种器件包括:半导体结构,包括设置在n型区域和p型区域之间的III族氮化物发光层和设置在n型区域和p型区域之一内的多个层对。 每层对包括与InGaN层直接接触的InGaN层和凹坑填充层。 凹坑填充层可以填充形成在InGaN层中的凹坑。