Mask and method to pattern chromeless phase lithography contact hole
    1.
    发明授权
    Mask and method to pattern chromeless phase lithography contact hole 有权
    掩模和方法来绘制无铬相光刻接触孔

    公开(公告)号:US08057968B2

    公开(公告)日:2011-11-15

    申请号:US12695167

    申请日:2010-01-28

    CPC classification number: G03F1/34

    Abstract: A method of making a mask is disclosed. The method includes providing a first and a second mask layers and disposing a first phase shift region on the first mask layer. A second phase shift region is disposed on the second mask layer, wherein the first and second phase shift regions are out of phase. A continuous unit cell is formed in the first phase shift region. The unit cell comprises a center section and distinct extension sections. The extension sections are contiguous to and extend outwards from the center section. The distinct extension sections have a same width as the center section. The second phase shift region is adjacent to the unit cell in the first phase shift region.

    Abstract translation: 公开了制作掩模的方法。 该方法包括提供第一和第二掩模层,并在第一掩模层上设置第一相移区域。 第二相移区域设置在第二掩模层上,其中第一和第二相移区域是异相的。 在第一相移区域中形成连续单元。 单元电池包括中心部分和不同的延伸部分。 延伸部分与中心部分相邻并向外延伸。 不同的延伸部分具有与中心部分相同的宽度。 第二相移区域与第一相移区域中的单元电池相邻。

    MONITORING STRUCTURE
    2.
    发明申请
    MONITORING STRUCTURE 有权
    监测结构

    公开(公告)号:US20080127998A1

    公开(公告)日:2008-06-05

    申请号:US11565623

    申请日:2006-11-30

    CPC classification number: G03F1/84 G03F1/44

    Abstract: The present invention relates to monitoring structures. More particularly, but not exclusively, the invention relates to a monitoring structures suitable for placement on masks. Still more particularly, but not exclusively, the invention relates to monitoring structures suitable for monitoring haze growth on photomasks. Embodiments of the invention provide apparatus for determining presence of contamination on a lithography mask, comprising: a fluid trap, the fluid trap comprising: a base and at least one wall member extending substantially perpendicularly to the base and arranged to trap fluid on a portion of the base when fluid introduced during a cleaning process of the mask is removed.

    Abstract translation: 本发明涉及监视结构。 更具体地但不排他地,本发明涉及适于放置在掩模上的监测结构。 更具体地但不排他地,本发明涉及适用于监测光掩模上的雾度生长的监测结构。 本发明的实施例提供了一种用于确定光刻掩模上污染的存在的装置,包括:流体捕集器,所述流体捕集器包括:基部和基本上垂直于所述基部延伸的至少一个壁构件, 当除去在面罩的清洁过程期间引入的流体时的基部。

    Half tone alternating phase shift masks
    3.
    发明授权
    Half tone alternating phase shift masks 失效
    半色调交替相移掩模

    公开(公告)号:US07014962B2

    公开(公告)日:2006-03-21

    申请号:US10661048

    申请日:2003-09-13

    CPC classification number: G03F1/32

    Abstract: A structure, a method of fabricating and a method of using a phase shift mask (PSM) having a first phase shifted section, a half tone section, and a second phase shifted section. The first phase shift section and the half tone section are shifted 180 degrees with the second phase shift region. Embodiments provide for (1) a half tone, single trench alternating phase shift mask and (2) a half tone, dual trench alternating phase shift mask. The half tone region provides advantages over conventional alternating phase shift masks.

    Abstract translation: 一种结构,制造方法和使用具有第一相移部分,半色调部分和第二相移部分的相移掩模(PSM)的方法。 第一相移部分和半色调部分与第二相移区域移动180度。 实施例提供(1)半色调单沟槽交替相移掩模和(2)半色调双沟道交替相移掩模。 半色调区域提供优于常规交替相移掩模的优点。

    Attenuation of reflecting lights by surface treatment
    4.
    发明授权
    Attenuation of reflecting lights by surface treatment 失效
    表面处理反射灯衰减

    公开(公告)号:US06451706B1

    公开(公告)日:2002-09-17

    申请号:US08657219

    申请日:1996-06-03

    CPC classification number: H01L21/32137 G03F7/091 H01L21/0276 H01L21/32139

    Abstract: A new method of avoiding resist notching in the formation of a polysilicon gate electrode in the fabrication of an integrated circuit device is described. Bare active areas are provided surrounded by field oxide isolation on a semiconductor substrate wherein the surface of the substrate has an uneven topography due to the uneven interface between the active areas and the isolation. A polysilicon layer is deposited over the active areas and the field oxide isolation of the substrate. The surface of the polysilicon layer is roughened using a plasma etching process wherein pits are formed on the surface which act as light traps. The roughened polysilicon layer is covered with a layer of photoresist. Portions of the photoresist layer are exposed to actinic light wherein reflection lights from the actinic light are trapped in the pits. The reflection lights do not reflect onto the unexposed portion of the photoresist layer. The photoresist layer is developed and patterned to form the desired photoresist mask for the polysilicon layer wherein the absence of reflection lights reflecting onto the unexposed portion of the photoresist results in the notch-free photoresist mask in the formation of a polysilicon gate electrode in the fabrication of an integrated circuit device.

    Abstract translation: 描述了在集成电路器件的制造中避免形成多晶硅栅电极时的抗蚀刻缺口的新方法。 在半导体衬底上围绕场氧化物隔离提供裸露的有源区域,其中由于有源区域与隔离之间的不平坦界面,衬底的表面具有不平坦的形貌。 多晶硅层沉积在有源区和衬底的场氧化物隔离之上。 使用等离子体蚀刻工艺将多晶硅层的表面粗糙化,其中在作为光阱的表面上形成有凹坑。 粗糙多晶硅层被一层光致抗蚀剂覆盖。 光致抗蚀剂层的一部分暴露于光化光,其中来自光化光的反射光被捕获在凹坑中。 反射光不会反射到光致抗蚀剂层的未曝光部分上。 光致抗蚀剂层被显影和图案化以形成用于多晶硅层的期望的光致抗蚀剂掩模,其中反射到光致抗蚀剂的未曝光部分上的反射光的不存在导致在制造中形成多晶硅栅电极的无切口光致抗蚀剂掩模 的集成电路装置。

    LITHO SCANNER ALIGNMENT SIGNAL IMPROVEMENT
    5.
    发明申请
    LITHO SCANNER ALIGNMENT SIGNAL IMPROVEMENT 有权
    LITHO扫描仪对准信号改进

    公开(公告)号:US20140050439A1

    公开(公告)日:2014-02-20

    申请号:US13588018

    申请日:2012-08-17

    CPC classification number: G02B6/136 G02B6/124 G03F7/70633

    Abstract: A method and a device are provided for diffracting incident light from a lithographic scanner in an IC process flow. Embodiments include forming a diffraction grating in a first layer on a semiconductor substrate; and forming a plurality of lithographic alignment marks in a second layer, overlying the first layer, wherein the diffraction grating has a width and a length greater than or equal to a width and length, respectively, of the plurality of lithographic alignment marks.

    Abstract translation: 提供了一种用于在IC工艺流程中衍射来自光刻扫描仪的入射光的方法和装置。 实施例包括在半导体衬底上的第一层中形成衍射光栅; 以及在覆盖所述第一层的第二层中形成多个平版印刷对准标记,其中所述衍射光栅的宽度和长度分别大于或等于所述多个平版印刷对准标记的宽度和长度。

    Monitoring structure
    6.
    发明授权
    Monitoring structure 有权
    监控结构

    公开(公告)号:US07866224B2

    公开(公告)日:2011-01-11

    申请号:US11565623

    申请日:2006-11-30

    CPC classification number: G03F1/84 G03F1/44

    Abstract: Apparatus is provided for determining presence of contamination on a lithography mask, including: a fluid trap having a base and at least one wall member extending substantially perpendicularly to the base for trapping fluid on a portion of the base when fluid introduced during a cleaning process of the mask is removed.

    Abstract translation: 提供了用于确定光刻掩模上的污染物存在的设备,包括:流体捕集器,其具有基部和至少一个基本上垂直于基底垂直延伸的壁构件,用于当在清洁过程中引入的流体 面具被去除。

    MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE
    7.
    发明申请
    MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE 有权
    用于绘制无色相位光刻接触孔的掩模和方法

    公开(公告)号:US20100196805A1

    公开(公告)日:2010-08-05

    申请号:US12695167

    申请日:2010-01-28

    CPC classification number: G03F1/34

    Abstract: A method of making a mask is disclosed. The method includes providing a first and a second mask layers and disposing a first phase shift region on the first mask layer. A second phase shift region is disposed on the second mask layer, wherein the first and second phase shift regions are out of phase. A continuous unit cell is formed in the first phase shift region. The unit cell comprises a center section and distinct extension sections. The extension sections are contiguous to and extend outwards from the center section. The distinct extension sections have a same width as the center section. The second phase shift region is adjacent to the unit cell in the first phase shift region.

    Abstract translation: 公开了制作掩模的方法。 该方法包括提供第一和第二掩模层,并在第一掩模层上设置第一相移区域。 第二相移区域设置在第二掩模层上,其中第一和第二相移区域是异相的。 在第一相移区域中形成连续单元。 单元电池包括中心部分和不同的延伸部分。 延伸部分与中心部分相邻并向外延伸。 不同的延伸部分具有与中心部分相同的宽度。 第二相移区域与第一相移区域中的单元电池相邻。

    Method for dual damascene patterning with single exposure using tri-tone phase shift mask
    8.
    发明授权
    Method for dual damascene patterning with single exposure using tri-tone phase shift mask 有权
    使用三色相移掩模的单次曝光的双镶嵌图案化方法

    公开(公告)号:US07288366B2

    公开(公告)日:2007-10-30

    申请号:US10693202

    申请日:2003-10-24

    CPC classification number: G03F1/32

    Abstract: A reticle structure and a method of forming a photoresist profile on a substrate using the reticle having a multi-level profile. The reticle comprises (1) a transparent substrate, (2) a partially transmitting 180 degree phase shift film overlying predetermined areas of the transparent substrate to transmit approximately 20 to 70% of incident light, and (3) an opaque film overlying the predetermined areas of the partially transmitting 180 degree phase shift film. The method comprises the following steps: a) depositing a photoresist film over the substrate; b) directing light to the photoresist film through the reticle, and c) developing the photoresist film to form an opening in the resist layer where light only passed thru the substrate, and to remove intermediate thickness of the photoresist film, in the areas where the light passed through the partially transmitting 180 degree phase shift film. In an aspect, the photoresist film is comprised of a lower photoresist layer and an upper photoresist layer. The lower photoresist layer is less sensitive to light than the upper photoresist layer. In an aspect, the resist profile is used to form a dual damascene shaped opening.

    Abstract translation: 掩模版结构和使用具有多层轮廓的掩模版在基板上形成光刻胶轮廓的方法。 掩模版包括(1)透明基板,(2)覆盖透明基板的预定区域的部分透射的180度相移膜,以透射大约20至70%的入射光,以及(3)覆盖预定区域的不透明膜 的部分透射180度相移膜。 该方法包括以下步骤:a)在衬底上沉积光致抗蚀剂膜; b)通过掩模版将光引导到光致抗蚀剂膜,以及c)使光致抗蚀剂膜显影,以在抗蚀剂层中形成光,其中只有光通过基底,并且除去光致抗蚀剂膜的中间厚度, 光通过部分透射的180度相移膜。 在一个方面,光致抗蚀剂膜由下光致抗蚀剂层和上光致抗蚀剂层组成。 下部光致抗蚀剂层比上部光致抗蚀剂层对光敏感性差。 在一方面,抗蚀剂轮廓用于形成双镶嵌形状的开口。

    Litho scanner alignment signal improvement
    9.
    发明授权
    Litho scanner alignment signal improvement 有权
    Litho扫描仪对准信号改善

    公开(公告)号:US09034720B2

    公开(公告)日:2015-05-19

    申请号:US13588018

    申请日:2012-08-17

    CPC classification number: G02B6/136 G02B6/124 G03F7/70633

    Abstract: A method and a device are provided for diffracting incident light from a lithographic scanner in an IC process flow. Embodiments include forming a diffraction grating in a first layer on a semiconductor substrate; and forming a plurality of lithographic alignment marks in a second layer, overlying the first layer, wherein the diffraction grating has a width and a length greater than or equal to a width and length, respectively, of the plurality of lithographic alignment marks.

    Abstract translation: 提供了一种用于在IC工艺流程中衍射来自光刻扫描仪的入射光的方法和装置。 实施例包括在半导体衬底上的第一层中形成衍射光栅; 以及在覆盖所述第一层的第二层中形成多个平版印刷对准标记,其中所述衍射光栅的宽度和长度分别大于或等于所述多个平版印刷对准标记的宽度和长度。

    WAFERLESS MEASUREMENT RECIPE
    10.
    发明申请
    WAFERLESS MEASUREMENT RECIPE 审中-公开
    无水测量仪器

    公开(公告)号:US20140019927A1

    公开(公告)日:2014-01-16

    申请号:US13545011

    申请日:2012-07-10

    CPC classification number: H01L22/12

    Abstract: Embodiments relate to a method for manufacturing and processing semiconductor devices or integrated circuits (IC) and in particular to the generation of measurement recipes in the manufacturing of the semiconductor devices or ICs. The method comprises defining a sampling plan, mapping target locations of a device contained in the sampling plan to an article/a wafer having a plurality of said devices, verifying the mapping file and processing the verification to produce a measurement recipe. In one embodiment, the measurement recipe is created without having the actual processed wafer.

    Abstract translation: 实施例涉及用于制造和处理半导体器件或集成电路(IC)的方法,特别是涉及在半导体器件或IC的制造中产生测量配方。 该方法包括定义采样计划,将采样计划中包含的设备的目标位置映射到具有多个所述设备的物品/晶片,验证映射文件并处理验证以产生测量配方。 在一个实施例中,创建测量配方而不具有实际处理的晶片。

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