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公开(公告)号：US07866224B2
公开(公告)日：2011-01-11
申请号：US11565623
申请日：2006-11-30
申请人： Sia Kim Tan , Gek Soon Chua , Qun Ying Lin , Martin Yeo
发明人： Sia Kim Tan , Gek Soon Chua , Qun Ying Lin , Martin Yeo
IPC分类号： B08B13/00
摘要： Apparatus is provided for determining presence of contamination on a lithography mask, including: a fluid trap having a base and at least one wall member extending substantially perpendicularly to the base for trapping fluid on a portion of the base when fluid introduced during a cleaning process of the mask is removed.
摘要翻译： 提供了用于确定光刻掩模上的污染物存在的设备，包括：流体捕集器，其具有基部和至少一个基本上垂直于基底垂直延伸的壁构件，用于当在清洁过程中引入的流体 面具被去除。
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公开(公告)号：US20080127998A1
公开(公告)日：2008-06-05
申请号：US11565623
申请日：2006-11-30
申请人： Sia Kim Tan , Gek Soon Chua , Qun Ying Lin , Martin Yeo
发明人： Sia Kim Tan , Gek Soon Chua , Qun Ying Lin , Martin Yeo
摘要： The present invention relates to monitoring structures. More particularly, but not exclusively, the invention relates to a monitoring structures suitable for placement on masks. Still more particularly, but not exclusively, the invention relates to monitoring structures suitable for monitoring haze growth on photomasks. Embodiments of the invention provide apparatus for determining presence of contamination on a lithography mask, comprising: a fluid trap, the fluid trap comprising: a base and at least one wall member extending substantially perpendicularly to the base and arranged to trap fluid on a portion of the base when fluid introduced during a cleaning process of the mask is removed.
摘要翻译： 本发明涉及监视结构。 更具体地但不排他地，本发明涉及适于放置在掩模上的监测结构。 更具体地但不排他地，本发明涉及适用于监测光掩模上的雾度生长的监测结构。 本发明的实施例提供了一种用于确定光刻掩模上污染的存在的装置，包括：流体捕集器，所述流体捕集器包括：基部和基本上垂直于所述基部延伸的至少一个壁构件， 当除去在面罩的清洁过程期间引入的流体时的基部。
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公开(公告)号：US07867698B2
公开(公告)日：2011-01-11
申请号：US12122866
申请日：2008-05-19
申请人： Gek Soon Chua , Sia Kim Tan , Byoung-IL Choi , Ryan Chong , Martin Yeo
发明人： Gek Soon Chua , Sia Kim Tan , Byoung-IL Choi , Ryan Chong , Martin Yeo
IPC分类号： G03C5/00
CPC分类号： G03F1/50
摘要： A reticle system that includes: providing a reticle system; and assigning two or more of an image pattern onto the reticle system to form one or more layers of an integrated circuit system by grouping and pairing each of the image pattern onto the reticle system according to a multi-layer reticle grouping/pairing flow.
摘要翻译： 一种掩模版系统，其包括：提供掩模版系统; 以及通过根据多层标线组分组/配对流将图像图案中的每一个分组并配对到光罩系统上，将两个或多个图像图案分配到标线系统上以形成集成电路系统的一个或多个层。
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公开(公告)号：US20090284721A1
公开(公告)日：2009-11-19
申请号：US12122866
申请日：2008-05-19
申请人： Gek Soon Chua , Sia Kim Tan , Byoung-IL Choi , Ryan Chong , Martin Yeo
发明人： Gek Soon Chua , Sia Kim Tan , Byoung-IL Choi , Ryan Chong , Martin Yeo
CPC分类号： G03F1/50
摘要： A reticle system that includes: providing a reticle system; and assigning two or more of an image pattern onto the reticle system to form one or more layers of an integrated circuit system by grouping and pairing each of the image pattern onto the reticle system according to a multi-layer reticle grouping/pairing flow.
摘要翻译： 一种掩模版系统，其包括：提供掩模版系统; 以及通过根据多层标线组分组/配对流将图像图案中的每一个分组并配对到光罩系统上，将两个或多个图像图案分配到标线系统上以形成集成电路系统的一个或多个层。
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5.发明申请INTEGRATED CIRCUIT SYSTEM EMPLOYING MULTIPLE EXPOSURE DUMMY PATTERNING TECHNOLOGY 有权集成电路系统采用多种曝光方式绘图技术公开(公告)号：US20090181551A1
公开(公告)日：2009-07-16
申请号：US11972809
申请日：2008-01-11
申请人： Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
发明人： Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
IPC分类号： H01L21/30
CPC分类号： H01L21/31144 , G03F1/36 , G03F7/70466 , H01L21/76816 , H01L23/522 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit system that includes: providing a substrate coated with a photoresist material; exposing the photoresist material to an energy source through a first mask to form a first substrate feature and a second substrate feature therein; and exposing the photoresist material to the energy source through a second mask to transform the second substrate feature into another one of the first substrate feature therein.
摘要翻译： 一种集成电路系统，包括：提供涂覆有光致抗蚀剂材料的基底; 通过第一掩模将光致抗蚀剂材料暴露于能量源以在其中形成第一衬底特征和第二衬底特征; 以及通过第二掩模将所述光致抗蚀剂材料暴露于所述能量源，以将所述第二衬底特征变换为所述第一衬底特征中的另一衬底特征。
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6.发明授权Integrated circuit system employing multiple exposure dummy patterning technology 有权采用多次曝光虚拟图形化技术的集成电路系统公开(公告)号：US08003311B2
公开(公告)日：2011-08-23
申请号：US11972809
申请日：2008-01-11
申请人： Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
发明人： Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
IPC分类号： G03F7/20
CPC分类号： H01L21/31144 , G03F1/36 , G03F7/70466 , H01L21/76816 , H01L23/522 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit system that includes: providing a substrate coated with a photoresist material; exposing the photoresist material to an energy source through a first mask to form a first substrate feature and a second substrate feature therein; and exposing the photoresist material to the energy source through a second mask to transform the second substrate feature into another one of the first substrate feature therein.
摘要翻译： 一种集成电路系统，包括：提供涂覆有光致抗蚀剂材料的基底; 通过第一掩模将光致抗蚀剂材料暴露于能量源以在其中形成第一衬底特征和第二衬底特征; 以及通过第二掩模将所述光致抗蚀剂材料暴露于所述能量源，以将所述第二衬底特征变换为所述第一衬底特征中的另一衬底特征。
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