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    FABRICATION METHOD OF CARBON NANOTUBE FIELD EMISSION CATHODE
    1.
    发明申请
    FABRICATION METHOD OF CARBON NANOTUBE FIELD EMISSION CATHODE 审中-公开
    碳纳米管场发射阴极的制备方法

    公开(公告)号：US20100285716A1

    公开(公告)日：2010-11-11

    申请号：US12489450

    申请日：2009-06-23

    Applicant: Borh-Ran Huang ,  Tzu-Ching Lin

    Inventor： Borh-Ran Huang ,  Tzu-Ching Lin

    IPC: H01J9/12

    CPC classification number: H01J9/025 ,  H01J2201/30434

    Abstract: A fabrication method of carbon nanotube field emission cathode is described as follows. Firstly, a composite plating solution including an electroless metal plating solution and a carbon nanotube powder disposed therein is provided. Then, a substrate is provided. The substrate is disposed in the composite plating solution so that an electroless composite plating process for forming a composite material layer on a surface of the substrate is performed. The composite material layer includes a carbon nanotube powder and a metal layer wrapping the carbon nanotube powder.

    Abstract translation: 碳纳米管场致发射阴极的制造方法如下所述。 首先，提供包含非电解金属电镀液和设置在其中的碳纳米管粉末的复合电镀液。 然后，提供基板。 将基板设置在复合电镀液中，从而进行用于在基板的表面上形成复合材料层的无电解复合电镀工序。 复合材料层包括碳纳米管粉末和包裹碳纳米管粉末的金属层。

    Anti-biofouling system
    2.
    发明授权
    Anti-biofouling system 失效
    防生物结垢系统

    公开(公告)号：US06514401B2

    公开(公告)日：2003-02-04

    申请号：US09847152

    申请日：2001-05-02

    Applicant: San-Der Chyou ,  Wen-Chi Chiang ,  Ran Huang ,  Jiann-Kuo Wu

    Inventor： San-Der Chyou ,  Wen-Chi Chiang ,  Ran Huang ,  Jiann-Kuo Wu

    IPC: C23F1300

    CPC classification number: B63B59/04

    Abstract: An anti-biofouling system adapted to be used for an underwater structure immersed in seawater is disclosed. The anti-biofouling system includes a conductive layer, comprising carbon fiber, graphite powder and binder, formed on a surface of the underwater structure for serving as an anode, a cathode, and a power supply for providing a current, thereby performing an electrolytic reaction for the anti-biofouling system such that a fouling organism is prohibited from attaching on the surface of the underwater structure.

    Abstract translation: 公开了适用于浸在海水中的水下结构的抗生物污垢系统。 防生物污垢系统包括形成在用作阳极的水下结构的表面上的碳纤维，石墨粉末和粘合剂的导电层，阴极和用于提供电流的电源，从而进行电解反应 用于防生物污垢系统，使得污物不被附着在水下结构的表面上。

    Frame Buffer Pixel Circuit of Liquid Crystal on Silicon Display Device
    4.
    发明申请
    Frame Buffer Pixel Circuit of Liquid Crystal on Silicon Display Device 审中-公开
    液晶显示装置上的液晶缓冲像素电路

    公开(公告)号：US20130069966A1

    公开(公告)日：2013-03-21

    申请号：US13701009

    申请日：2011-08-17

    Applicant: Bohua Zhao ,  Ran Huang ,  Huan Du ,  Jiajun Luo ,  Bin Lin

    Inventor： Bohua Zhao ,  Ran Huang ,  Huan Du ,  Jiajun Luo ,  Bin Lin

    IPC: G09G5/00

    CPC classification number: G09G5/001 ,  G09G3/3648 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0251 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2360/18 ,  G11C19/184

    Abstract: The present invention discloses a frame buffer pixel circuit for a LCoS display device, wherein said circuit consists of a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), a sixth transistor (M6), a storage capacitor (C1) and a pixel capacitor (C2), wherein, the first transistor (M1) forms a pre-charge circuit, the second transistor (M2) and the third transistor (M3) form a threshold voltage generating circuit, the storage capacitor (C1) forms a sample and hold circuit, the fourth transistor (M4), the fifth transistor (M5) and the pixel capacitor (C2) form an input data voltage read-in circuit, and the sixth transistor (M6) forms a discharge circuit. The present invention has a threshold voltage added when writing the input data voltage into the storage capacitor so as to cancel out the threshold voltage lost by reading the voltage on the storage capacitor onto the pixel capacitor, thereby ensuring consistency of the output pixel voltage and improving the display effect.

    Abstract translation: 本发明公开了一种用于LCoS显示装置的帧缓冲像素电路，其中所述电路由第一晶体管（M1），第二晶体管（M2），第三晶体管（M3），第四晶体管（M4），第五晶体管 晶体管（M5），第六晶体管（M6），存储电容器（C1）和像素电容器（C2），其中，第一晶体管（M1）形成预充电电路，第二晶体管（M2） 晶体管（M3）形成阈值电压发生电路，存储电容器（C1）形成采样保持电路，第四晶体管（M4），第五晶体管（M5）和像素电容器（C2）形成输入数据电压读 并且第六晶体管（M6）形成放电电路。 本发明在将输入数据电压写入存储电容器时附加了阈值电压，以通过将存储电容器上的电压读入像素电容器来消除阈值电压损失，从而确保输出像素电压的一致性和改善 显示效果。

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