Broadcast Media with Targeted Advertising
    1.
    发明申请
    Broadcast Media with Targeted Advertising 审中-公开
    广播媒体与目标广告

    公开(公告)号:US20130227598A1

    公开(公告)日:2013-08-29

    申请号:US13585551

    申请日:2012-08-14

    IPC分类号: H04N21/442

    摘要: Systems and methods are provided for renting a peripheral storage entity to a remote client. From the service provider's vantage, one method transceives negotiation signals between a remote first client (the user) and a service provider, via a network link. Using the negotiation signals, the service provider agrees to rent a peripheral storage entity to the first client, and sends digital content from the peripheral storage entity via the network link to the remote first client. The peripheral storage entity may be located with the service provider or with a remote second client. System and methods are also provided from the perspective of remote clients that are either receiving or supplying peripheral storage entity content.

    摘要翻译: 系统和方法用于将外围存储实体租给远程客户端。 从服务提供商的优势来看,一种方法通过网络链路收发远程第一客户端(用户)和服务提供商之间的协商信号。 使用协商信号,服务提供商同意向第一客户端租用外围存储实体,并且经由网络链路将数字内容从外围存储实体发送到远程第一客户端。 外围存储实体可以与服务提供商或远程第二客户端一起定位。 从远程客户端的角度还提供系统和方法,这些客户端正在接收或提供外围存储实体内容。

    Synchronous payload envelope mapping without pointer adjustments
    2.
    发明授权
    Synchronous payload envelope mapping without pointer adjustments 有权
    无指针调整的同步有效载荷包络映射

    公开(公告)号:US07940806B1

    公开(公告)日:2011-05-10

    申请号:US12888930

    申请日:2010-09-23

    IPC分类号: H04J3/06

    CPC分类号: H04J3/1611 H04J3/076

    摘要: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.

    摘要翻译: 提供了一种用于将信息映射到同步有效载荷信封(SPE)的系统和方法。 该方法以基于系统时钟的标准数据速率提供大约等于系统时钟的信息字节,但可以进行调整。 外部时钟的速率大致等于系统时钟速率。 该方法生成具有相同位置的信息字节的SPE,而不管系统和外部时钟速率之间的差异。 SPE与传输开销(TOH)组合,并以外部时钟速率作为消息帧发送。 尽管系统和外部时钟速率之间存在差异,但仍生成维持每个SPE内的信息字节的位置而无指针调整的SPE。 以另一种方式表示,消息帧由有效载荷和TOH部分生成,并且信息字节专门位于有效载荷部分中。 因此,对于所有的SPE来说,维持恒定指针值(例如,H1 / H2或V1 / V2)。

    System and method for synchronous payload envelope mapping without pointer adjustments
    3.
    发明申请
    System and method for synchronous payload envelope mapping without pointer adjustments 有权
    无指针调整的同步有效载荷包络映射的系统和方法

    公开(公告)号:US20080002717A1

    公开(公告)日:2008-01-03

    申请号:US11478249

    申请日:2006-06-29

    IPC分类号: H04L12/56

    CPC分类号: H04J3/1611 H04J3/076

    摘要: A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.

    摘要翻译: 提供了一种用于将信息映射到同步有效载荷信封(SPE)的系统和方法。 该方法以基于系统时钟的标准数据速率提供大约等于系统时钟的信息字节,但可以进行调整。 外部时钟的速率大致等于系统时钟速率。 该方法生成具有相同位置的信息字节的SPE,而不管系统和外部时钟速率之间的差异。 SPE与传输开销(TOH)组合,并以外部时钟速率作为消息帧发送。 尽管系统和外部时钟速率之间存在差异,但仍生成维持每个SPE内的信息字节的位置而无指针调整的SPE。 以另一种方式表示,消息帧由有效载荷和TOH部分生成,并且信息字节专门位于有效载荷部分中。 因此,对于所有的SPE来说,维持恒定指针值(例如,H1 / H2或V1 / V2)。

    Digital semiconductor based smart surface
    5.
    发明申请
    Digital semiconductor based smart surface 失效
    数字半导体智能表面

    公开(公告)号:US20050162498A1

    公开(公告)日:2005-07-28

    申请号:US11009243

    申请日:2004-12-08

    摘要: A smart surface is composed of a semiconductor memory layer overlaid on an insulated conductive layer with a one to one correspondence of each memory cell with the conductive pad on the insulated layer. The entire structure can be fashioned into a either a planar structure or other geometric structure. An appliance may be overlaid the smart surface and signals transmitted and received to and from the appliance via the conductive pad(s) of the smart surface.

    摘要翻译: 智能表面由覆盖在绝缘导电层上的半导体存储层组成,每个存储单元与绝缘层上的导电焊盘一一对应。 整个结构可以被制成平面结构或其他几何结构。 智能表面上的设备可以通过智能表面的导电焊盘覆盖在发射和接收设备的智能表面。

    Multiservice system and method for packet and time division multiplexed transport
    6.
    发明授权
    Multiservice system and method for packet and time division multiplexed transport 有权
    用于分组和时分复用传输的多业务系统和方法

    公开(公告)号:US07944949B2

    公开(公告)日:2011-05-17

    申请号:US11974730

    申请日:2007-10-16

    IPC分类号: H04J3/06

    摘要: A system and method are presented for providing packet and time division multiplex (TDM) services in a data communication interface. The method accepts packets at a first rate over a packet interface, and transfers time-sensitive data in the packets as packet data units (PDUs) having a smaller number of bits than a packet and a second rate, faster than the first rate. The method transforms the PDUs into frames in a first TDM protocol. Typically, the PDUs are transformed into units having a smaller number of bits than the PDU and a third rate, faster than the second rate. Then, the TDM frames are transmitted over a line interface.

    摘要翻译: 提出了一种用于在数据通信接口中提供分组和时分复用(TDM)服务的系统和方法。 该方法通过分组接口以第一速率接收分组,并且将分组中的时间敏感数据作为具有比分组的比特数少的分组数据单元(PDU)和比第一速率快的第二速率传送。 该方法将PDU以第一TDM协议转换成帧。 通常,将PDU转换为具有比PDU少的位数的单元和比第二速率快的第三速率的单元。 然后,TDM帧通过线路接口传输。

    System and method for converting multichannel time division multiplexed data into packets
    7.
    发明授权
    System and method for converting multichannel time division multiplexed data into packets 有权
    将多通道时分复用数据转换为数据包的系统和方法

    公开(公告)号:US07835393B2

    公开(公告)日:2010-11-16

    申请号:US12015130

    申请日:2008-01-16

    IPC分类号: H04J3/16

    摘要: A system and method are provided for converting multichannel serial data streams into packets. The method accepts a plurality of serial data streams in a corresponding plurality of channels. In a time domain multiplexed (TDM) fashion, groups with an undetermined number of data bits are packed from each data stream, into an associated channel segment queue, where each segment includes a predetermined number of bits. In a TDM fashion, segments are loaded into an associated channel payload queue, where each payload includes a predetermined number of segments. Once a payload is filled, an associated pointer is created in a pointer queue. The method selects a pointer from the pointer queue, creates a packet from the payload associated with the selected pointer, and transmits the packet via a packet interface. The packet overhead may include information stored in the pointer, a packet header, or a cyclic redundancy check (CRC) checksum.

    摘要翻译: 提供了一种用于将多通道串行数据流转换成分组的系统和方法。 该方法在相应的多个信道中接受多个串行数据流。 在时域多路复用(TDM)方式中,将具有不确定数量的数据位的组从每个数据流打包成相关的信道段队列,其中每个段包括预定数量的位。 以TDM方式,段被加载到相关联的信道有效载荷队列中,其中每个有效载荷包括预定数量的段。 一旦有效载荷被填充,在指针队列中创建一个相关联的指针。 该方法从指针队列中选择一个指针,从与所选指针相关联的有效载荷中创建一个数据包,并通过一个数据包接口发送该数据包。 分组开销可以包括存储在指针中的信息,分组报头或循环冗余校验(CRC)校验和。

    Remote Rental of Digital Content Peripheral Storage Entities
    8.
    发明申请
    Remote Rental of Digital Content Peripheral Storage Entities 审中-公开
    数字内容外围存储实体的远程租赁

    公开(公告)号:US20100125529A1

    公开(公告)日:2010-05-20

    申请号:US12621261

    申请日:2009-11-18

    摘要: Systems and methods are provided for renting a peripheral storage entity to a remote client. From the service provider's vantage, one method transceives negotiation signals between a remote first client (the user) and a service provider, via a network link. Using the negotiation signals, the service provider agrees to rent a peripheral storage entity to the first client, and sends digital content from the peripheral storage entity via the network link to the remote first client. The peripheral storage entity may be located with the service provider or with a remote second client. System and methods are also provided from the perspective of remote clients that are either receiving or supplying peripheral storage entity content.

    摘要翻译: 系统和方法用于将外围存储实体租给远程客户端。 从服务提供商的优势来看,一种方法通过网络链路收发远程第一客户端(用户)和服务提供商之间的协商信号。 使用协商信号,服务提供商同意向第一客户端租用外围存储实体,并且经由网络链路将数字内容从外围存储实体发送到远程第一客户端。 外围存储实体可以与服务提供商或远程第二客户端一起定位。 从远程客户端的角度还提供系统和方法,这些客户端正在接收或提供外围存储实体内容。

    Sampled accumulation system and method for jitter attenuation
    9.
    发明申请
    Sampled accumulation system and method for jitter attenuation 有权
    采样累积系统和抖动衰减方法

    公开(公告)号:US20080075125A1

    公开(公告)日:2008-03-27

    申请号:US11525656

    申请日:2006-09-22

    IPC分类号: H04J3/07

    CPC分类号: H04J3/1611 H04J3/076

    摘要: A system and method are provided for a sampled accumulation method that maps information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries, and sequentially stores buffer-fill information for each tributary in a first memory, at a rate of up to one tributary per system clock (Fsys) cycle. A stored accumulation of buffer-fill information for each tributary is updated at a sample rate frequency (Fsample), where Fsample≦Fsys. The stored accumulation of buffer-fill information is used to calculate stuff bit opportunities for each tributary. As a result, the rate of data being mapped into outgoing tributaries is regulated, and the outgoing mapped tributaries are combined in a SPE.

    摘要翻译: 提供了一种用于将信息映射到同步有效载荷包络(SPE)的采样累积方法的系统和方法。 该方法缓冲来自多个支路的数据,并且以每个系统时钟(Fsys)周期最多一个支路的速率,顺序地将每个支路的缓冲区填充信息存储在第一存储器中。 每个支流的缓冲区填充信息的存储积累以采样率频率(Fsample)更新,其中Fsample = Fsys。 缓冲区填充信息的存储积累用于计算每个支流的填充位机会。 因此,映射到出站支路的数据速率受到限制,出站映射支路在SPE中组合。

    Method for making BIMOS device having a bipolar transistor and a MOS
triggering transistor
    10.
    发明授权
    Method for making BIMOS device having a bipolar transistor and a MOS triggering transistor 失效
    用于制造具有双极晶体管和MOS触发晶体管的BIMOS器件的方法

    公开(公告)号:US5459083A

    公开(公告)日:1995-10-17

    申请号:US24719

    申请日:1993-03-01

    IPC分类号: H01L27/07 H01L21/265

    CPC分类号: H01L27/0722 Y10S148/009

    摘要: The present invention includes a BiMOS device having an MOS transistor that triggers a bipolar transistor, wherein the base and channel region are formed within a well region that electrically floats. The present invention also includes a BiMOS device having separate regions for the collector and drain regions and for the base and channel regions. The present invention further includes processes for forming the BiMOS devices. The BiMOS device may include a floating well region. The BiMOS device may include both low voltage MOS logic transistors and a high voltage or high power bipolar transistor. A low voltage or low power bipolar transistor may also be used. Separate drain, collector, base, and channel regions allow the bipolar transistor performance to be optimized independently of the MOS transistor, which may have its performance independently optimized, too. A plurality of MOS logic transistors, such as an AND or an OR gate may be used in the BiMOS device.

    摘要翻译: 本发明包括具有触发双极晶体管的MOS晶体管的BiMOS器件,其中基极和沟道区域形成在电漂浮的阱区内。 本发明还包括具有用于集电极和漏极区域以及基极和沟道区域的分离区域的BiMOS器件。 本发明还包括用于形成BiMOS器件的工艺。 BiMOS装置可以包括浮动井区域。 BiMOS器件可以包括低电压MOS逻辑晶体管和高电压或高功率双极晶体管。 也可以使用低电压或低功率双极晶体管。 单独的漏极,集电极,基极和沟道区域可以独立于可能具有独立优化的MOS晶体管来优化双极晶体管性能。 在BiMOS器件中可以使用多个MOS逻辑晶体管,诸如AND或OR门。