Abstract:
A programmable controller has a rack that electrically connects a number of I/O modules to a processor module. The processor module includes a external device communication interface section and a general purpose processor section electrically coupled together by a set of common buses. Both of these module sections include a microprocessor and memory connected by an internal set of buses which are isolatable from the set of common buses. The isolation capability permits the different sections to perform their operations simultaneously. A shared system memory and an rack interface are coupled to the common buses for the exchange of data with the I/O modules. A unique ladder logic processor also is connected directly to the common buses. The ladder logic processor includes a hardwired Boolean bit logic processor and a custom microcoded processor to execute instructions of a ladder type control program. Program instructions which are too complex for execution by the ladder logic processor are executed by the general purpose processor section.
Abstract:
The present invention is a multiprocessor machine control system in which the failure of one of the processors to reset can be ignored by the rest of the control system. In particular, a software crash or other abnormality on one of the processors will generate a reset procedure. If the processor cannot be reset, this will indicate a processor board failure such as a hardware failure. If the processor and its controlled elements are not crucial to the machine operation, then the control wll ignore the failed processor as though it were not in the control system, and continue with machine operation.
Abstract:
The present invention is a multiprocessor control system that allows full job recovery after a machine power down or after a malfunction or software crash or temporary power outage. In particular, essential variables such as the state and status of the machine and the programmed job at the time of the malfunction are maintained in nonvolatile memory. This information is continually updated in nonvolatile memory. Once the control system has reset and reinitialized all the control elements after a malfunction, the control restores or downloads all the relevant variables in the nonvolatile memory to the various control elements to maintain status. In another embodiment, the essential variables are maintained in RAM locations in a master processor and saved for downloading to the control elements.
Abstract:
An industrial controller having a number of addressable I/O modules, employs an I/O map table linking software addresses used for developing the control program to actual physical addresses of the I/O modules on a network. By employing software addresses for connection points to the control process, the program may be developed independent of the topology of the network connecting the processor to the I/O modules and changes in that topology may be made without affecting the control program, but simply by changing the I/O map table. A single change in the I/O map table re-connects an I/O module for all references in the control program.
Abstract:
In an industrial controller associated with independent I/O modules for exchanging signals between a controlled machine and the controller, a control program executed by the controller is associated with an I/O map identifying functionality of the independent I/O modules. At initialization of the controller, function keys are transmitted to the I/O modules, the latter which confirm that they are capable of the functions expected by the control program. The I/O modules may change their function according to the function keys and may accept functions not identical to those performed by the I/O module if the I/O module performs at greater functionality.
Abstract:
The present invention is a chain of interchangeable control boards controlling the operation of a sequence of sorters. A first control board responds to a sort command. If a first sorter under the control of the first control board is unable to complete the sort operation, a second control board receives a related command. If the second sorter under control of the second control board is unable to complete the sort operation, a third control board receives another related command. Finally, one of the sorters in the chain completes the sort operation and a notification of the completion is carried back up the chain of control boards.
Abstract:
A coordinated system time is established for spatially separated components of an industrial control system using synchronizing messages transmitted over a communication link between those parts. Precisely coordinated actions may be obtained at separated components by the use of a time conditional command received by those components prior to a time of execution the command instructing the component to execute the command only when at execution time in the future has been reached. The coordinated system time may be used to time stamp received triggering events for use in coordinating subsequent actions based on those triggering events.
Abstract:
A compiler for an industrial controller uses a user modifiable instruction table to contain code fragments necessary to compile particular instructions. During compilation, the instructions are replaced with the code fragments. Thus new instructions recognizable by the compiler may be added simply by editing this instruction table. Multiple instructions having the same name are resolved through a best match of operand types which examines the possible data loss in conversion of operand types to select a particular one of the instructions.
Abstract:
An industrial control system includes an industrial controller and a programming interface. The programming interface is operable to communicate a plurality of operations for modifying a control program maintained by the industrial controller followed by a commit transaction command. The industrial controller is configured to designate the plurality of operations with a pending status and preprocess the plurality of operations. The industrial controller is further configured to commit the operations and clear the pending status responsive to receiving the commit transaction command.
Abstract:
A system and method for industrial control I/O forcing is provided. The invention includes a processor, shared memory and an I/O processor with cache memory. The invention provides for the cache memory to be loaded with I/O force data from the shared memory. The I/O processor performs I/O forcing utilizing the I/O force data stored in the cache memory. The invention further provides for the processor to notify the I/O processor in the event that I/O force data is altered during control program execution. The invention further provides for the I/O processor to refresh the cache memory (e.g., via a blocked write) after receipt of alteration of the I/O force data from the processor.