Abstract:
A print head, formed with spaced linear subheads of jet nozzles, prints all of the lines or image element rows on a print medium such as a sheet of paper by scanning along the face of the sheet. The head is advanced between scans by an equivalent number of lines generally equal to the number of nozzles in the head, whereby all print lines are addressed only once. Apparatus for printing includes the use of pointers in registers to keep track of head structure and location on a print medium for calculating print addresses. A partial page memory is used which wraps around to the beginning from the end. An edge sequence control logic circuit modifies the print data so that nozzles not over the image area do not print. A positive printer carriage position encoder uses an index marker located in the middle of a strip of incremental markers. Sensing of the index marker resets an up/down counter with a value that gives a positive value for all count conditions.
Abstract:
Print heads are formed with spaced subheads having nozzles such that all of the lines or pixel rows on a print medium such as a sheet of paper are printed by scanning of the print head along the face of the sheet. The head structures include three subheads, each having nozzles for printing one or more adjacent lines with the subheads being spaced the same number of lines apart as the number of lines each prints; and three subheads spaced the equivalent of seven lines apart, each subhead having three nozzles spaced at the equivalent of alternate lines. The heads are advanced between scans by an equivalent number of lines generally equal to the number of nozzles in the head, whereby all print lines are addressed only once. Apparatus for printing includes the use of pointers in registers to keep track of head structure and location on a print medium for calculating print addresses. A partial page memory is used which wraps around to the beginning from the end. A positive printer carriage position encoder uses an index marker located in the middle of a strip of incremental markers. Sensing of the index marker resets an up/down counter with a value that gives a positive value for all count conditions.
Abstract:
A method providing for the non-wetting of predetermined portions of articles exposed to molten filler metals during soldering or brazing operations wherein predetermined areas of said elements are provided with a layer of chemical vapor deposited titanium carbide with an overlayer of titanium nitride or with a layer of titanium diboride to resist wetting of the coated areas by the filler metals. Articles coated by the non-wetting titanium compounds include circuit board support brackets and other elements used in immersion soldering machines, and heating elements for soldering operations such as soldering tips for various types of heated soldering tools and the like.
Abstract:
A means and method for accessing a digital memory system in a manner permitting the transfer of a two-byte information signal into and out of a storage area defined by any two logically adjacent memory bytes. Provision is also made for maintaining a preselected locational integrity between the bytes forming the information signal.
Abstract:
Color dither patterns are read into a pixel bit map memory used to form a color display by means of concurrently addressing a pattern memory storing the dither patterns. Lower order address bits repeatedly access a preselected portion of the pattern memory to supply the dither pattern which is written as data into the pixel bit map memory.
Abstract:
A microprocessor-based apparatus for testing the electrical condition of electronic circuitry, particularly computers, employs a buffer and a latch associated with each of the address bus and the data bus to provide electrical isolation of said buses. In using the apparatus, the integrity of a central testing "kernel" comprising the testing program itself with its testing data in ROM is first verified. The testing program then evaluates, in order, the data bus, the address bus, and then such additional and addressable circuitry as may be connected to said data bus and address bus. Incorporation of analog-to-digital converters permits determination of actual circuit node voltages, in addition to digital levels or the presence of open or short circuits.
Abstract:
Graphics commands for a display are listed and divided into sublists corresponding to separate strips or bands of the display, and these sublists drive the display memory consecutively and substantially concurrently with the processing of additional sublists. Graphics commands relating to graphics extending between bands are transferred to successive sublists during processing to provide their display in successive bands. A pair of band size bit map memories are alternately loaded with band information and read out.