Granularity memory column access
    2.
    发明授权
    Granularity memory column access 失效
    粒度内存列访问

    公开(公告)号:US06825841B2

    公开(公告)日:2004-11-30

    申请号:US09949464

    申请日:2001-09-07

    IPC分类号: G06F1576

    摘要: A memory device includes multiple data I/O lanes and corresponding lane or column decoders. Instead of providing the same address to each column decoder, decoder logic calculates potentially different column addresses depending on the needs of the device utilizing the memory. For example, the column addresses might be based on a received CAS address and an accompanying offset. This allows data access at alignments that do not necessarily correspond to CAS alignments. The technique is utilized in conjunction with graphics systems in which tiling is used. In systems such as this, memory offsets are specified in terms of pixel columns and rows. The technique is also used in conjunction with a router such as a TCP/IP router, in which individual packets are aligned at CAS boundaries. In this situation, the decoder logic is alternatively configurable to allow access of either an information packet or a plurality of packet headers during a single memory access cycle.

    摘要翻译: 存储器件包括多个数据I / O通道和相应的通道或列解码器。 代替向每个列解码器提供相同的地址,解码器逻辑根据使用存储器的设备的需要来计算潜在的不同的列地址。 例如,列地址可能基于接收的CAS地址和附带的偏移。 这允许在不一定对应于CAS对准的对准处的数据访问。 该技术与使用平铺的图形系统结合使用。 在这样的系统中,以像素列和行来指定存储器偏移。 该技术还与诸如TCP / IP路由器的路由器结合使用,其中各个分组在CAS边界处对齐。 在这种情况下,解码器逻辑可选地可配置为允许在单个存储器访问周期期间访问信息分组或多个分组报头。

    Apparatus for Data Recovery in a Synchronous Chip-to-Chip System
    3.
    发明申请
    Apparatus for Data Recovery in a Synchronous Chip-to-Chip System 有权
    用于同步芯片到芯片系统中的数据恢复的装置

    公开(公告)号:US20110255615A1

    公开(公告)日:2011-10-20

    申请号:US13169901

    申请日:2011-06-27

    IPC分类号: H04L27/00

    摘要: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

    摘要翻译: 减少设备之间传送的数据的采样误差的装置使用从定时参考信号(例如选通信号)获取的相位信息,以对齐用于采样与定时参考信号一起发送的数据信号的数据采样信号。 可以通过根据从选通信号获取的相位信息可调地延迟时钟信号来提供数据采样信号。 与定时参考信号相比,数据采样信号也可以具有改进的波形,包括百分之五十的占空比和尖锐的转变。 从定时参考信号获取的相位信息也可以用于其他目的,例如将接收的数据与本地时钟域对准,或者发送数据,使得其与远程设备上的参考时钟信号同步到达远程设备 。

    Apparatus for data recovery in a synchronous chip-to-chip system
    6.
    发明授权
    Apparatus for data recovery in a synchronous chip-to-chip system 有权
    用于同步芯片到芯片系统中的数据恢复的装置

    公开(公告)号:US08208595B2

    公开(公告)日:2012-06-26

    申请号:US13169901

    申请日:2011-06-27

    IPC分类号: H04L7/00

    摘要: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

    摘要翻译: 减少设备之间传送的数据的采样误差的装置使用从定时参考信号(例如选通信号)获取的相位信息,以对齐用于采样与定时参考信号一起发送的数据信号的数据采样信号。 可以通过根据从选通信号获取的相位信息可调地延迟时钟信号来提供数据采样信号。 与定时参考信号相比,数据采样信号也可以具有改进的波形,包括百分之五十的占空比和尖锐的转变。 从定时参考信号获取的相位信息也可以用于其他目的,例如将接收的数据与本地时钟域对准,或者发送数据,使得其与远程设备上的参考时钟信号同步到达远程设备 。

    Apparatus for Data Recovery in a Synchronous Chip-to-Chip System
    7.
    发明申请
    Apparatus for Data Recovery in a Synchronous Chip-to-Chip System 有权
    用于同步芯片到芯片系统中的数据恢复的装置

    公开(公告)号:US20100073047A1

    公开(公告)日:2010-03-25

    申请号:US12628547

    申请日:2009-12-01

    IPC分类号: H03L7/06

    摘要: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

    摘要翻译: 减少设备之间传送的数据的采样误差的装置使用从定时参考信号(例如选通信号)获取的相位信息,以对齐用于采样与定时参考信号一起发送的数据信号的数据采样信号。 可以通过根据从选通信号获取的相位信息可调地延迟时钟信号来提供数据采样信号。 与定时参考信号相比,数据采样信号也可以具有改进的波形,包括百分之五十的占空比和尖锐的转变。 从定时参考信号获取的相位信息也可以用于其他目的,例如将接收的数据与本地时钟域对准,或者发送数据,使得其与远程设备上的参考时钟信号同步到达远程设备 。

    Apparatus for data recovery in a synchronous chip-to-chip system
    8.
    发明授权
    Apparatus for data recovery in a synchronous chip-to-chip system 有权
    用于同步芯片到芯片系统中的数据恢复的装置

    公开(公告)号:US06836503B2

    公开(公告)日:2004-12-28

    申请号:US10353608

    申请日:2003-01-28

    IPC分类号: H04L700

    摘要: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

    摘要翻译: 减少设备之间传送的数据的采样误差的装置使用从定时参考信号(例如选通信号)获取的相位信息,以对齐用于采样与定时参考信号一起发送的数据信号的数据采样信号。 可以通过根据从选通信号获取的相位信息可调地延迟时钟信号来提供数据采样信号。 与定时参考信号相比,数据采样信号也可以具有改进的波形,包括百分之五十的占空比和尖锐的转变。 从定时参考信号获取的相位信息也可以用于其他目的,例如将接收的数据与本地时钟域对准,或者发送数据,使得其与远程设备上的参考时钟信号同步到达远程设备 。

    Methods and arrangements for conditionally enforcing CAS latencies in memory devices
    9.
    发明授权
    Methods and arrangements for conditionally enforcing CAS latencies in memory devices 有权
    有条件地执行存储器件中CAS延迟的方法和安排

    公开(公告)号:US06542416B1

    公开(公告)日:2003-04-01

    申请号:US10001030

    申请日:2001-11-02

    IPC分类号: G11C700

    摘要: Methods and arrangements are provided for use in memory devices, which allow column address strobe (CAS) timing to adjust to, and/or be adjusted by a controller to, have both minimal unloaded latency and optimal pipelined latency. A delay CAS (DC) period is only applied until a row-to-column delay (tRCD) has been satisfied. Once the tRCD has been satisfied, then the DC period is not enforced for subsequent CAS operations within the memory core associated with a page hit. When a subsequent read command is received at the input/output pins of the memory device and a corresponding RAS operation is performed in the memory core, then the tRCD will again need to be satisfied and a DC period will again be enforced. Consequently the methods and arrangements allow the CAS delay to be dynamically and selectively adjusted to best support the workload. This results in better performance and increased bandwidth.

    摘要翻译: 方法和布置被提供用于存储器件,其允许列地址选通(CAS)时序调整到和/或被控制器调整为具有最小的无负载延迟和最佳流水线延迟。 只有在满足行到列延迟(tRCD)之后才应用延迟CAS(DC)周期。 一旦满足tRCD,则在与页面匹配相关联的存储器核心内的后续CAS操作中不执行DC周期。 当在存储器件的输入/输出引脚处接收到随后的读取命令并且在存储器核心中执行相应的RAS操作时,则再次需要满足tRCD并且再次执行DC周期。 因此,方法和布置允许CAS延迟被动态和选择性地调整以最好地支持工作负载。 这导致更好的性能和增加的带宽。

    Apparatus for data recovery in a synchronous chip-to-chip system
    10.
    发明授权
    Apparatus for data recovery in a synchronous chip-to-chip system 有权
    用于同步芯片到芯片系统中的数据恢复的装置

    公开(公告)号:US07970089B2

    公开(公告)日:2011-06-28

    申请号:US12628547

    申请日:2009-12-01

    IPC分类号: H04L7/00

    摘要: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

    摘要翻译: 减少设备之间传送的数据的采样误差的装置使用从定时参考信号(例如选通信号)获取的相位信息,以对齐用于采样与定时参考信号一起发送的数据信号的数据采样信号。 可以通过根据从选通信号获取的相位信息可调地延迟时钟信号来提供数据采样信号。 与定时参考信号相比,数据采样信号也可以具有改进的波形,包括百分之五十的占空比和尖锐的转变。 从定时参考信号获取的相位信息也可以用于其他目的,例如将接收的数据与本地时钟域对准,或者发送数据,使得其与远程设备上的参考时钟信号同步到达远程设备 。