Trusted Cryptographic Processor
    8.
    发明申请
    Trusted Cryptographic Processor 有权
    可信密码处理器

    公开(公告)号:US20070245141A1

    公开(公告)日:2007-10-18

    申请号:US11428505

    申请日:2006-07-03

    Abstract: A cryptographic processor for redundantly-processing cryptographic operations is disclosed. The cryptographic processor includes a number of input ports, a first and second cryptographic engines, comparison logic and a plurality of output ports. The number of input ports is configured to accept both plaintext and ciphertext. Each of the number of input ports is coupled to both the first and second cryptographic engines. The comparison logic is configured to determine if the first and second cryptographic engines produce a result that is different. The number of output ports is configured to produce both plaintext and ciphertext.

    Abstract translation: 公开了一种用于冗余处理加密操作的密码处理器。 密码处理器包括多个输入端口,第一和第二密码引擎,比较逻辑和多个输出端口。 输入端口的数量被配置为接受明文和密文。 多个输入端口中的每一个耦合到第一和第二密码引擎。 比较逻辑被配置为确定第一和第二密码引擎是否产生不同的结果。 输出端口的数量被配置为产生明文和密文。

    Synchronized High-Assurance Circuits
    9.
    发明申请
    Synchronized High-Assurance Circuits 有权
    同步高保证电路

    公开(公告)号:US20070113230A1

    公开(公告)日:2007-05-17

    申请号:US11428516

    申请日:2006-07-03

    CPC classification number: G06F9/52 G06F11/1645 G06F11/1687

    Abstract: A high-assurance system for processing information is disclosed. The high-assurance system comprising first and second processors, a task matching circuit, and first and second outputs. The task matching circuit configured to determine a software routine is ready for execution on the first processor, and delay the first processor until the second processor is ready to execute the software routine. The first output of the first processor configured to produce a first result with the software routine. The second output of the second processor configured to produce a second result with the software routine, where the first result is identical to the second result.

    Abstract translation: 公开了一种用于处理信息的高保证系统。 包括第一和第二处理器,任务匹配电路以及第一和第二输出的高保证系统。 被配置为确定软件例程的任务匹配电路准备好在第一处理器上执行,并延迟第一处理器直到第二处理器准备好执行软件程序。 第一个处理器的第一个输出被配置为利用软件程序产生第一个结果。 第二处理器的第二输出被配置为利用软件程序产生第二结果,其中第一结果与第二结果相同。

Patent Agency Ranking