公开(公告)号：US11804849B2

公开(公告)日：2023-10-31

申请号：US17657991

申请日：2022-04-05

Applicant: STMicroelectronics KK

Inventor： Ryo Tsutsui

IPC: H03M3/00 ,  G06F7/58 ,  H03M1/06 ,  H03H17/00 ,  H03H17/02

CPC classification number: H03M3/33 ,  G06F7/588 ,  H03M1/0626 ,  G06F2207/583 ,  H03H17/0213 ,  H03H2017/0072

Abstract: An infinite impulse response filter includes a plurality of lower order filter stages and a random number generator circuit. The plurality of lower order filter stages include a first filter stage coupled to a second filter stage. The random number generator circuit includes a first output coupled to the first filter stage and a second output coupled to the second filter stage. The random number generator circuit is configured to generate the same random value at both the first output and the second output. The infinite impulse response filter is an nth-order filter. The respective order of each of the lower order filter stages is less than n.

公开(公告)号：US11323130B2

公开(公告)日：2022-05-03

申请号：US16683859

申请日：2019-11-14

Applicant: STMicroelectronics KK

Inventor： Ryo Tsutsui

IPC: G06F7/58 ,  H03H17/00 ,  H03H17/02 ,  H03M3/00 ,  H03M1/06

Abstract: A method of filtering includes generating a random value by a random number generator circuit, filtering a first signal by a first filter to form a filtered first signal, dithering the filtered first signal using the random value to form a dithered first signal, filtering a second signal by a second filter to form a filtered second signal, and dithering the filtered second signal using the random value to form a dithered second signal.

公开(公告)号：US10418987B2

公开(公告)日：2019-09-17

申请号：US16052449

申请日：2018-08-01

Applicant: STMicroelectronics KK

Inventor： Luca Bartolomeo ,  Kazuo Eguchi ,  Giuseppe Davide Bruno

IPC: H03L5/00 ,  H03K19/0185 ,  H03K17/16 ,  H01L29/16 ,  H03K17/10 ,  H03K3/313 ,  H03K17/691 ,  H01L29/78

Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.

公开(公告)号：US11942113B2

公开(公告)日：2024-03-26

申请号：US18166291

申请日：2023-02-08

Applicant: STMICROELECTRONICS KK ,  STMICROELECTRONICS S.r.l.

Inventor： Marco Ferrari ,  Davide Betta ,  Diego Tognoli ,  Roberto Trabattoni

IPC: G11B5/54 ,  G11B5/48 ,  G11B21/08

CPC classification number: G11B21/083

Abstract: In accordance with an embodiment, a hard disk drive includes voice coil motors (VCMs) coupled to respective control units configured to drive retract an operation of the VCMs in the hard disk drive. The retract operation of the VCMs includes a sequence of retract steps. The control units are allotted respective time slots for communication over a communication line with the respective time slots synchronized via the common clock line, and are configured to drive sequences of retract steps of the VCMs in the hard disk drive in a timed relationship.

公开(公告)号：US20200162098A1

公开(公告)日：2020-05-21

申请号：US16683859

申请日：2019-11-14

Applicant: STMicroelectronics KK

Inventor： Ryo Tsutsui

IPC: H03M3/00 ,  H03M1/06 ,  G06F7/58

Abstract: A method of filtering includes generating a random value by a random number generator circuit, filtering a first signal by a first filter to form a filtered first signal, dithering the filtered first signal using the random value to form a dithered first signal, filtering a second signal by a second filter to form a filtered second signal, and dithering the filtered second signal using the random value to form a dithered second signal.

公开(公告)号：US20180191341A1

公开(公告)日：2018-07-05

申请号：US15396964

申请日：2017-01-03

Applicant: STMicroelectronics KK

Inventor： Luca Bartolomeo ,  Kazuo Eguchi ,  Giuseppe Davide Bruno

IPC: H03K17/16 ,  H01L29/16 ,  H01L29/78 ,  H03K17/10 ,  H03K3/313

CPC classification number: H03K17/161 ,  H01L29/1608 ,  H01L29/78 ,  H03K3/313 ,  H03K17/102 ,  H03K17/162 ,  H03K17/691 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.

公开(公告)号：US20240212714A1

公开(公告)日：2024-06-27

申请号：US18597484

申请日：2024-03-06

Applicant: STMicroelectronics KK ,  STMicroelectronics S.r. l.

Inventor： Marco Ferrari ,  Davide Betta ,  Diego Tognoli ,  Roberto Trabattoni

IPC: G11B21/08

CPC classification number: G11B21/083

Abstract: In accordance with an embodiment, a hard disk drive includes voice coil motors (VCMs) coupled to respective control units configured to drive retract an operation of the VCMs in the hard disk drive. The retract operation of the VCMs includes a sequence of retract steps. The control units are allotted respective time slots for communication over a communication line with the respective time slots synchronized via the common clock line, and are configured to drive sequences of retract steps of the VCMs in the hard disk drive in a timed relationship.

公开(公告)号：US20230267963A1

公开(公告)日：2023-08-24

申请号：US18166291

申请日：2023-02-08

Applicant: STMICROELECTRONICS KK ,  STMICROELECTRONICS S.r.l.

Inventor： Marco Ferrari ,  Davide Betta ,  Diego Tognoli ,  Roberto Trabattoni

IPC: G11B21/08

CPC classification number: G11B21/083

Abstract: In accordance with an embodiment, a hard disk drive includes voice coil motors (VCMs) coupled to respective control units configured to drive retract an operation of the VCMs in the hard disk drive. The retract operation of the VCMs includes a sequence of retract steps. The control units are allotted respective time slots for communication over a communication line with the respective time slots synchronized via the common clock line, and are configured to drive sequences of retract steps of the VCMs in the hard disk drive in a timed relationship.

公开(公告)号：US10063227B2

公开(公告)日：2018-08-28

申请号：US15396964

申请日：2017-01-03

Applicant: STMicroelectronics KK

Inventor： Luca Bartolomeo ,  Kazuo Eguchi ,  Giuseppe Davide Bruno

IPC: H03L5/00 ,  H03K19/0185 ,  H03K17/16 ,  H01L29/16 ,  H01L29/78 ,  H03K17/10 ,  H03K3/313

Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.

公开(公告)号：US20220231697A1

公开(公告)日：2022-07-21

申请号：US17657991

申请日：2022-04-05

Applicant: STMicroelectronics KK

Inventor： Ryo Tsutsui

IPC: H03M3/00 ,  G06F7/58 ,  H03M1/06

Abstract: An infinite impulse response filter includes a plurality of lower order filter stages and a random number generator circuit. The plurality of lower order filter stages include a first filter stage coupled to a second filter stage. The random number generator circuit includes a first output coupled to the first filter stage and a second output coupled to the second filter stage. The random number generator circuit is configured to generate the same random value at both the first output and the second output. The infinite impulse response filter is an nth-order filter. The respective order of each of the lower order filter stages is less than n.