Adaptive voltage scaling based on the results of forward error correction processing
    1.
    发明授权
    Adaptive voltage scaling based on the results of forward error correction processing 有权
    基于前向纠错处理结果的自适应电压缩放

    公开(公告)号:US09158356B2

    公开(公告)日:2015-10-13

    申请号:US13170747

    申请日:2011-06-28

    摘要: In one implementation, a device may include a voltage regulator circuit, a data processing circuit, and an error correction circuit, where the error correction circuit may correct errors in data processed by the data processing circuit to obtain error-corrected data and output an error-corrected version of the processed data. Additionally, an error monitor circuit may output an error signal indicative of a level of the errors in the processed data. A control circuit may receive the error signal and control the voltage regulator circuit to adjust, based on the error signal, the supply voltage to the data processing circuit. In some implementations, the control circuit may also base its decision to control the voltage regulator circuit based on available timing margins in the data processing circuit.

    摘要翻译: 在一个实现中,设备可以包括电压调节器电路,数据处理电路和纠错电路,其中纠错电路可以校正由数据处理电路处理的数据中的错误,以获得纠错数据并输出错误 - 已处理数据的已更正版本。 此外,错误监视电路可以输出指示处理数据中的错误级别的错误信号。 控制电路可以接收误差信号并且控制电压调节器电路基于误差信号来调整数据处理电路的电源电压。 在一些实施方案中,控制电路还可以基于其决定,以基于数据处理电路中的可用时序余量来控制电压调节器电路。

    Iterative forward error correction (FEC) on segmented words using a soft-metric arithmetic scheme
    2.
    发明授权
    Iterative forward error correction (FEC) on segmented words using a soft-metric arithmetic scheme 有权
    使用软度算术方案对分段字进行迭代前向纠错(FEC)

    公开(公告)号:US08965776B2

    公开(公告)日:2015-02-24

    申请号:US13435913

    申请日:2012-03-30

    IPC分类号: H04L1/00 H03M13/45

    摘要: A system is to receive a word on which to perform error correction; obtain segments, from the word, each segment including a respective subset of samples; update, on a per segment basis, the word based on extrinsic information associated with a previous word; identify sets of least reliable positions (LRPs) associated with the segments; create a subset of LRPs based on a subset of samples within the sets of LRPs; generate candidate words based on the subset of LRPs; identify errors within the word or the candidate words; update, using the extrinsic information, a segment of the word that includes an error; determine distances between the candidate words and the updated word that includes the updated segment; identify best words associated with shortest distances; and perform error correction, on a next word, using other extrinsic information that is based on the best words.

    摘要翻译: 系统是接收要进行纠错的单词; 从单词中获取段,每个段包括相应的样本子集; 基于每个段来更新基于与前一个单词相关联的外部信息的单词; 识别与段相关联的最不可靠位置集合(LRP); 基于LRP集合中的样本子集创建LRP的子集; 基于LRP的子集生成候选词; 识别单词或候选词中的错误; 更新,使用外在信息,包含错误的单词段; 确定候选词与包括更新段的更新单词之间的距离; 识别与最短距离相关的最佳词; 并使用基于最佳单词的其他外在信息对下一个字进行纠错。

    ITERATIVE FORWARD ERROR CORRECTION (FEC) ON SEGMENTED WORDS USING A SOFT-METRIC ARITHMETIC SCHEME
    3.
    发明申请
    ITERATIVE FORWARD ERROR CORRECTION (FEC) ON SEGMENTED WORDS USING A SOFT-METRIC ARITHMETIC SCHEME 有权
    使用软质计算方法对已分配的词进行迭代前向纠错(FEC)

    公开(公告)号:US20130262084A1

    公开(公告)日:2013-10-03

    申请号:US13435913

    申请日:2012-03-30

    IPC分类号: G06F17/27

    摘要: A system is to receive a word on which to perform error correction; obtain segments, from the word, each segment including a respective subset of samples; update, on a per segment basis, the word based on extrinsic information associated with a previous word; identify sets of least reliable positions (LRPs) associated with the segments; create a subset of LRPs based on a subset of samples within the sets of LRPs; generate candidate words based on the subset of LRPs; identify errors within the word or the candidate words; update, using the extrinsic information, a segment of the word that includes an error; determine distances between the candidate words and the updated word that includes the updated segment; identify best words associated with shortest distances; and perform error correction, on a next word, using other extrinsic information that is based on the best words.

    摘要翻译: 系统是接收要进行纠错的单词; 从单词中获取段,每个段包括相应的样本子集; 基于每个段来更新基于与前一个单词相关联的外部信息的单词; 识别与段相关联的最不可靠位置集合(LRP); 基于LRP集合中的样本子集创建LRP的子集; 基于LRP的子集生成候选词; 识别单词或候选词中的错误; 更新,使用外在信息,包含错误的单词段; 确定候选词与包括更新段的更新单词之间的距离; 识别与最短距离相关的最佳词; 并使用基于最佳单词的其他外在信息对下一个字进行纠错。

    ADAPTIVE VOLTAGE SCALING BASED ON THE RESULTS OF FORWARD ERROR CORRECTION PROCESSING
    4.
    发明申请
    ADAPTIVE VOLTAGE SCALING BASED ON THE RESULTS OF FORWARD ERROR CORRECTION PROCESSING 有权
    基于前向纠错处理结果的自适应电压调整

    公开(公告)号:US20130007516A1

    公开(公告)日:2013-01-03

    申请号:US13170747

    申请日:2011-06-28

    IPC分类号: G06F11/07

    摘要: In one implementation, a device may include a voltage regulator circuit, a data processing circuit, and an error correction circuit, where the error correction circuit may correct errors in data processed by the data processing circuit to obtain error-corrected data and output an error-corrected version of the processed data. Additionally, an error monitor circuit may output an error signal indicative of a level of the errors in the processed data. A control circuit may receive the error signal and control the voltage regulator circuit to adjust, based on the error signal, the supply voltage to the data processing circuit. In some implementations, the control circuit may also base its decision to control the voltage regulator circuit based on available timing margins in the data processing circuit.

    摘要翻译: 在一个实现中,设备可以包括电压调节器电路,数据处理电路和纠错电路,其中纠错电路可以校正由数据处理电路处理的数据中的错误,以获得纠错数据并输出错误 - 已处理数据的已更正版本。 此外,错误监视电路可以输出指示处理数据中的错误级别的错误信号。 控制电路可以接收误差信号并且控制电压调节器电路基于误差信号来调整数据处理电路的电源电压。 在一些实施方案中,控制电路还可以基于其决定,以基于数据处理电路中的可用时序余量来控制电压调节器电路。

    Dispersion compensation in optical systems
    5.
    发明授权
    Dispersion compensation in optical systems 有权
    光学系统中的色散补偿

    公开(公告)号:US07386240B2

    公开(公告)日:2008-06-10

    申请号:US10822077

    申请日:2004-04-09

    IPC分类号: H04B10/04 H04B10/12 G06F17/10

    CPC分类号: H04B10/25133 H04B2210/254

    摘要: In one aspect a system and method for providing a multi-port memory having a plurality of read ports, each read port including a filter coefficient value representing a dispersion compensation value associated with an optical link. The method includes processing an input optical signal using the filter coefficient values in the multi-port memory to generate an output optical signal for transmission on the optical link.

    摘要翻译: 在一方面,提供具有多个读端口的多端口存储器的系统和方法,每个读端口包括表示与光链路相关联的色散补偿值的滤波器系数值。 该方法包括使用多端口存储器中的滤波器系数值来处理输入光信号以产生用于在光链路上传输的输出光信号。

    Coherent detection using coherent decoding and interleaving
    6.
    发明授权
    Coherent detection using coherent decoding and interleaving 有权
    使用相干解码和交织的相干检测

    公开(公告)号:US08861636B2

    公开(公告)日:2014-10-14

    申请号:US13250462

    申请日:2011-09-30

    摘要: A system is configured to receive a block of symbols, associated with a phase-modulated signal that includes data symbols that correspond to a payload associated with the signal, and control symbols; process the control symbols to identify an amount of phase noise associated with the control symbols; reset a phase, associated with each of the data symbols, based on the amount of phase noise and a reference phase; interleave the respective data samples, of each of the data symbols with other data samples, where the interleaved respective data samples cause errors, associated with the respective data samples, to be spread out among the other data samples and reduces an error rate relative to a prior data rate that existed before the interleaving; and perform forward error correction on the interleaved respective data samples.

    摘要翻译: 系统被配置为接收与包括对应于与所述信号相关联的有效载荷的数据符号的相位调制信号和控制符号相关联的符号块; 处理控制符号以识别与控制符号相关联的相位噪声量; 基于相位噪声量和参考相位复位与每个数据符号相关联的相位; 将每个数据符号的各个数据样本与其他数据样本进行交织,其中交织的相应数据样本导致与各个数据样本相关联的错误在其它数据样本之间展开,并减少相对于 在交织之前存在的先前数据速率; 并对交错的各个数据样本执行前向纠错。

    Method, system, and apparatus for interpolating an output of an analog-to-digital converter
    7.
    发明授权
    Method, system, and apparatus for interpolating an output of an analog-to-digital converter 有权
    用于内插模数转换器的输出的方法,系统和装置

    公开(公告)号:US08477056B2

    公开(公告)日:2013-07-02

    申请号:US12791694

    申请日:2010-06-01

    IPC分类号: H03M1/12

    摘要: A system, method, and apparatus is disclosed for interpolation of an output of an analog to digital converter (ADC) to enable operation of the ADC at a sampling rate that is independent of the sampling rate for a DSP core so as to efficiently enable operation at higher date rates. According to one of the embodiments, an interpolation circuit is coupled between the ADC and DSP core and receives a first plurality of samples of data at the first data rate from the ADC and supplies a plurality of samples of second data at a second data rate to the DSP core; the second data rate being less than the first data rate. According to one of the embodiments, the interpolation circuit includes a memory and a FIR filter circuit having filter tap coefficient values selected to provide attenuation at high frequencies to reduce aliasing noise.

    摘要翻译: 公开了一种用于对模数转换器(ADC)的输出进行插值的系统,方法和装置,以使得能够以独立于DSP核的采样率的采样速率对ADC进行操作,以便有效地使能操作 以较高的日期率。 根据实施例之一,内插电路耦合在ADC和DSP内核之间,并从ADC接收第一数据速率的第一多个数据采样,并将第二数据的多个样本以第二数据速率提供给 DSP内核; 第二数据速率小于第一数据速率。 根据实施例中的一个,内插电路包括存储器和具有滤波器抽头系数值的FIR滤波器电路,该滤波器抽头系数值被选择以在高频率下提供衰减以减少混叠噪声。

    COHERENT DETECTION USING COHERENT DECODING AND INTERLEAVING
    8.
    发明申请
    COHERENT DETECTION USING COHERENT DECODING AND INTERLEAVING 有权
    使用相关解码和交互的相似检测

    公开(公告)号:US20130022147A1

    公开(公告)日:2013-01-24

    申请号:US13250462

    申请日:2011-09-30

    IPC分类号: H04L27/22 H04B15/00

    摘要: A system is configured to receive a block of symbols, associated with a phase-modulated signal that includes data symbols that correspond to a payload associated with the signal, and control symbols; process the control symbols to identify an amount of phase noise associated with the control symbols; reset a phase, associated with each of the data symbols, based on the amount of phase noise and a reference phase; interleave the respective data samples, of each of the data symbols with other data samples, where the interleaved respective data samples cause errors, associated with the respective data samples, to be spread out among the other data samples and reduces an error rate relative to a prior data rate that existed before the interleaving; and perform forward error correction on the interleaved respective data samples.

    摘要翻译: 系统被配置为接收与包括对应于与所述信号相关联的有效载荷的数据符号的相位调制信号和控制符号相关联的符号块; 处理控制符号以识别与控制符号相关联的相位噪声量; 基于相位噪声量和参考相位复位与每个数据符号相关联的相位; 将每个数据符号的各个数据样本与其他数据样本进行交织,其中交织的相应数据样本导致与各个数据样本相关联的错误,在其他数据样本中展开,并减少相对于 在交织之前存在的先前数据速率; 并对交错的各个数据样本执行前向纠错。

    METHOD, SYSTEM, AND APPARATUS FOR INTERPOLATING AN OUTPUT OF AN ANALOG-TO-DIGITAL CONVERTER
    9.
    发明申请
    METHOD, SYSTEM, AND APPARATUS FOR INTERPOLATING AN OUTPUT OF AN ANALOG-TO-DIGITAL CONVERTER 有权
    用于插入模拟数字转换器输出的方法,系统和装置

    公开(公告)号:US20110291865A1

    公开(公告)日:2011-12-01

    申请号:US12791694

    申请日:2010-06-01

    IPC分类号: H03M7/00

    摘要: A system, method, and apparatus is disclosed for interpolation of an output of an analog to digital converter (ADC) to enable operation of the ADC at a sampling rate that is independent of the sampling rate for a DSP core so as to efficiently enable operation at higher date rates. According to one of the embodiments, an interpolation circuit is coupled between the ADC and DSP core and receives a first plurality of samples of data at the first data rate from the ADC and supplies a plurality of samples of second data at a second data rate to the DSP core; the second data rate being less than the first data rate. According to one of the embodiments, the interpolation circuit includes a memory and a FIR filter circuit having filter tap coefficient values selected to provide attenuation at high frequencies to reduce aliasing noise.

    摘要翻译: 公开了一种用于对模数转换器(ADC)的输出进行插值的系统,方法和装置,以使得能够以独立于DSP核的采样率的采样速率对ADC进行操作,以便有效地使能操作 以较高的日期率。 根据实施例之一,内插电路耦合在ADC和DSP内核之间,并从ADC接收第一数据速率的第一多个数据采样,并将第二数据的多个样本以第二数据速率提供给 DSP内核; 第二数据速率小于第一数据速率。 根据实施例中的一个,内插电路包括存储器和具有滤波器抽头系数值的FIR滤波器电路,该滤波器抽头系数值被选择以在高频率下提供衰减以减少混叠噪声。