Identifying a cache way of a cache access request using information from the microtag and from the micro TLB
    1.
    发明授权
    Identifying a cache way of a cache access request using information from the microtag and from the micro TLB 有权
    使用来自微标签和微型TLB的信息来识别缓存访问请求的缓存方式

    公开(公告)号:US07596663B2

    公开(公告)日:2009-09-29

    申请号:US11599596

    申请日:2006-11-15

    IPC分类号: G06F12/00

    摘要: A data processor operable to process data said data processor comprising: a set associative cache divided into a plurality of cache ways and operable to store data processed by said data processor; a buffer operable to store a table comprising a plurality of mappings of pages of virtual addresses to pages of physical addresses for said data processor; a data store comprising a plurality of data entries each operable to store data for identifying an address of a memory location for each of a plurality of recent cache accesses, each of said plurality of data entries comprising a page index indicating a page in an address space, offset data indicating a location within said page and cache way data identifying a cache way of a cache storage location accessed by said cache access; wherein said data processor is operable in response to a cache access request comprising a virtual address indicating a memory location to access said table and said data store to determine whether said cache access request is to one of said plurality of recently accessed cache storage locations and if so to identify a cache way of said cache storage location from data stored in both said data store and said table.

    摘要翻译: 数据处理器,可操作用于处理数据,所述数据处理器包括:分组为多个高速缓存路径并可操作以存储由所述数据处理器处理的数据的集合相关高速缓存; 缓冲器,用于将包括多个虚拟地址页面的表的表存储到所述数据处理器的物理地址页; 数据存储器,其包括多个数据条目,每个数据条目可操作以存储用于识别多个最近高速缓存访​​问中的每一个的存储器位置的地址的数据,所述多个数据条目中的每一个包括指示地址空间中的页面的页面索引 ,指示所述页面内的位置的偏移数据和标识由所述高速缓存访​​问访问的高速缓存存储位置的高速缓存方式的高速缓存路数据; 其中所述数据处理器可操作以响应于高速缓存访​​问请求,所述高速缓存访​​问请求包括指示访问所述表的存储器位置的虚拟地址和所述数据存储,以确定所述高速缓存访​​问请求是否是所述多个最近访问的缓存存储位置之一,以及 因此从存储在所述数据存储器和所述表中的数据中识别所述高速缓存存储位置的缓存方式。