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37 条记录 (耗时 0.025 秒)

    System and method for generating two effective frequencies using a single clock
    3.
    发明授权
    System and method for generating two effective frequencies using a single clock 有权
    使用单个时钟产生两个有效频率的系统和方法

    公开(公告)号：US07486121B2

    公开(公告)日：2009-02-03

    申请号：US10938467

    申请日：2004-09-09

    申请人： Kang Xiao ,  Steve Thomas ,  Robert Holder ,  Timothy Chan

    发明人： Kang Xiao ,  Steve Thomas ,  Robert Holder ,  Timothy Chan

    IPC分类号： H03K5/01 ,  G01R31/28

    CPC分类号： H03K5/00006 ,  H03K5/156

    摘要： A method and apparatus are disclosed for generating a second clock signal, having a second effective clock frequency, from a first clock signal, having a first effective clock frequency. Clock pulses of the first clock signal are counted to generate a count value. When the count value reaches a predetermined blanking value, a blanking signal is generated. The blanking signal blanks at least one clock pulse of the first clock signal. The process is repeated multiple times at a predetermined rate corresponding to the predetermined blanking value to generate the second clock signal.

    摘要翻译： 公开了一种用于从具有第一有效时钟频率的第一时钟信号产生具有第二有效时钟频率的第二时钟信号的方法和装置。 对第一时钟信号的时钟脉冲进行计数以产生计数值。 当计数值达到预定的消隐值时，产生消隐信号。 消隐信号使第一时钟信号的至少一个时钟脉冲空白。 该过程以对应于预定消隐值的预定速率重复多次以产生第二时钟信号。

    Method and system for a three conductor transceiver bus
    5.
    发明授权
    Method and system for a three conductor transceiver bus 失效
    三导体收发器总线的方法和系统

    公开(公告)号：US07391788B2

    公开(公告)日：2008-06-24

    申请号：US10299172

    申请日：2002-11-19

    申请人： Chenmin Zhang ,  Steve Thomas ,  Randall Stolaruk

    发明人： Chenmin Zhang ,  Steve Thomas ,  Randall Stolaruk

    IPC分类号： H04L12/40

    CPC分类号： H04L12/403 ,  G06F13/4291 ,  H04L12/40

    摘要： Aspects of the invention provide a method and system for a communication bus for resetting one or more devices connected to the bus. The transceiver bus (620) may include a single serial data line (616), a single serial clock line (614) and a single reset line (612). A status of a slave device coupled to the transceiver bus (620) may be determined by a master device. Based on the status of the slave device, the master device may execute a forced reset or a normal reset. In a case where a device may be unresponsive, the master device may execute a forced reset. Additionally, in a case where a device is responsive but requires resetting, the master device may execute a normal reset and selectively reset a slave device requiring reset.

    摘要翻译： 本发明的方面提供了一种用于重置连接到总线的一个或多个设备的通信总线的方法和系统。 收发机总线（620）可以包括单个串行数据线（616），单个串行时钟线（614）和单个复位线（612）。 耦合到收发器总线（620）的从设备的状态可由主设备确定。 基于从设备的状态，主设备可以执行强制复位或正常复位。 在设备无响应的情况下，主设备可以执行强制重置。 此外，在设备响应但需要重置的情况下，主设备可以执行正常复位并且有选择地复位需要复位的从设备。

    Assembly, method and system for aligning a driver to a pump
    6.
    发明申请
    Assembly, method and system for aligning a driver to a pump 有权
    用于将驱动器与泵对齐的组件，方法和系统

    公开(公告)号：US20070044337A1

    公开(公告)日：2007-03-01

    申请号：US11508695

    申请日：2006-08-23

    申请人： Tommy Harlon ,  Benji Hodges ,  Steve Thomas

    发明人： Tommy Harlon ,  Benji Hodges ,  Steve Thomas

    IPC分类号： G01D21/00

    CPC分类号： G01B5/25 ,  Y10T29/49764 ,  Y10T29/49778 ,  Y10T29/49947

    摘要： The present alignment tool, method, and system improve the alignment of a driver to a motor. The alignment tool includes a securing ring, a track, and a rotatable ring. The rotatable ring of the alignment tool eliminates the onerous and dangerous rotation of the driver, or motor, previously required for aligning the motor to the pump.

    摘要翻译： 本对准工具，方法和系统改善了驱动器与电机的对准。 对准工具包括固定环，轨道和可旋转环。 对准工具的可旋转环消除了驱动器或电动机的重负载和危险的旋转，驱动器或电机以前需要将电动机对准泵。

    Method and system for onboard bit error rate (BER) estimation in a port bypass controller
    7.
    发明申请
    Method and system for onboard bit error rate (BER) estimation in a port bypass controller 失效
    端口旁路控制器中板载误码率（BER）估计的方法和系统

    公开(公告)号：US20050132258A1

    公开(公告)日：2005-06-16

    申请号：US10779001

    申请日：2004-02-13

    申请人： Chung-Jue Chen ,  Ali Ghiasi ,  Jay Proano ,  Rajesh Satapathy ,  Steve Thomas

    发明人： Chung-Jue Chen ,  Ali Ghiasi ,  Jay Proano ,  Rajesh Satapathy ,  Steve Thomas

    IPC分类号： G06F11/00 ,  H04L1/00 ,  H04L1/20 ,  H04L1/24

    CPC分类号： H04L1/245 ,  H04L1/0061 ,  H04L1/203 ,  H04L2001/0094

    摘要： Certain aspects of the method may comprise receiving via a first port of the port bypass controller, a data stream comprising at least one known bit pattern. Upon locking onto at least a portion of the known bit pattern in the received data stream, a bit error rate may be generated based on a bit-by-bit comparison of at least a portion of the data stream received after locking occurs. At least a portion of the data stream may be compared with a corresponding portion of expected data. The bit error rate may be calculated based on results from comparing at least a portion of the data stream with a corresponding portion of the expected data. The known bit pattern may be internally generated within the port bypass controller or it may be externally generated by a host system.

    摘要翻译： 该方法的某些方面可以包括经由端口旁路控制器的第一端口接收包括至少一个已知位模式的数据流。 在锁定到所接收的数据流中的已知位模式的至少一部分之后，可以基于锁定发生后接收到的数据流的至少一部分的比特比较来产生误码率。 数据流的至少一部分可以与预期数据的相应部分进行比较。 可以基于将数据流的至少一部分与预期数据的对应部分进行比较的结果来计算误码率。 已知位模式可以在端口旁路控制器内部生成，或者可以由主机系统从外部生成。

    Method and system for seamless dual switching in a port bypass controller
    8.
    发明申请
    Method and system for seamless dual switching in a port bypass controller 有权
    端口旁路控制器无缝双切换的方法和系统

    公开(公告)号：US20050131988A1

    公开(公告)日：2005-06-16

    申请号：US10779234

    申请日：2004-02-13

    申请人： Chung-Jue Chen ,  Ali Ghiasi ,  Jay Proano ,  Rajesh Satapathy ,  Steve Thomas

    发明人： Chung-Jue Chen ,  Ali Ghiasi ,  Jay Proano ,  Rajesh Satapathy ,  Steve Thomas

    IPC分类号： H04L12/437 ,  H04L12/56 ,  G06F15/16

    CPC分类号： H04L12/437 ,  H04L49/357 ,  H04L49/552

    摘要： Certain aspects of the invention for seamless port bypass controller operations for storage systems, for example, and may comprise a first port of a port bypass controller that receives an input signal and at least one of a plurality of selectors that selects at least a second port coupled in a chain to the first port. At least one of the selectors may switch at least a portion of the received input signal from the first port to at least the second port without initializing or reconfiguring the second port. A repeater may repeat at least a portion of the received input signal to the second port without initializing or reconfiguring the second port. A retimer may generate a retimed signal corresponding to at least a portion of the received input signal to the second port without initializing or reconfiguring the second port.

    摘要翻译： 例如，用于存储系统的无缝端口旁路控制器操作的本发明的某些方面可以包括接收输入信号的端口旁路控制器的第一端口和选择至少第二端口的多个选择器中的至少一个 连接到第一个港口。 至少一个选择器可以将接收到的输入信号的至少一部分从第一端口切换到至少第二端口，而不初始化或重新配置第二端口。 中继器可以将接收的输入信号的至少一部分重复到第二端口，而不初始化或重新配置第二端口。 重新定时器可以在不初始化或重新配置第二端口的情况下产生对应于接收到的输入信号的至少一部分到第二端口的重新定时信号。