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    Efficient and phased method of processing large collections of electronic data known as “best match first”™ for electronic discovery and other related applications
    1.
    发明授权
    Efficient and phased method of processing large collections of electronic data known as “best match first”™ for electronic discovery and other related applications 有权
    处理大量电子数据收集的高效和分阶段方法，被称为“最佳匹配第一”™，用于电子发现和其他相关应用

    公开(公告)号：US08819021B1

    公开(公告)日：2014-08-26

    申请号：US12021259

    申请日：2008-01-28

    申请人： Elizabeth B. Charnock ,  Steven L. Roberts

    发明人： Elizabeth B. Charnock ,  Steven L. Roberts

    IPC分类号： G06F7/00 ,  G06F17/30

    CPC分类号： G06F17/30657

    摘要： A method of more efficient, phased, iterative processing of very large collections of electronic data for the purposes of electronic discovery and related applications is disclosed. The processing minimally includes: text extraction, and the creation of a keyword search index, but may include many additional stages of processing as well. The method further includes: definition of an initial set of characteristics that correspond to “interesting” data, followed by the iterative completion of processing of this data based on a combination of user feedback on the overall relevance of the documents being processed and the system's assessment of whether or not the data it has recently selected to promote in the processing completion queue has the desired quality and quantity of relevant data. The process continues until all identified data has either been fully processed, or discarded at some intermediate stage of processing as being likely irrelevant. This has the result of effectively finishing the processing much earlier, as the later documents in the processing queue will be increasingly irrelevant.

    摘要翻译： 公开了一种用于电子发现和相关应用目的的用于电子数据的非常大的集合的更有效，分阶段，迭代处理的方法。 处理最低限度包括：文本提取和关键字搜索索引的创建，但也可以包括许多其他处理阶段。 该方法还包括：定义对应于“有趣”数据的初始特征集合，随后基于用户对正在处理的文档的整体相关性和系统评估的组合的反馈来完成该数据的处理 其最近选择在数据处理完成队列中促进的数据是否具有所需的相关数据质量和数量。 该过程一直持续到所有已识别的数据已被完全处理，或者在处理的某个中间阶段丢弃，因为可能不相关。 这样做的结果是能够更早地有效地完成处理，因为处理队列中的后续文档将越来越不相关。

    Masking a boot sequence by providing a dummy processor
    4.
    发明授权
    Masking a boot sequence by providing a dummy processor 失效
    通过提供一个虚拟处理器来屏蔽引导序列

    公开(公告)号：US07774617B2

    公开(公告)日：2010-08-10

    申请号：US12120847

    申请日：2008-05-15

    申请人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    发明人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    IPC分类号： G06F21/00

    CPC分类号： G06F9/4406 ,  G06F21/575 ,  G06F21/75 ,  G06F21/755 ,  H04L9/08 ,  H04L2209/04 ,  H04L2209/08

    摘要： A mechanism is provided for masking a boot sequence by providing a dummy processor. With the mechanism, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

    摘要翻译： 提供了一种用于通过提供虚拟处理器来掩蔽引导序列的机制。 使用该机制，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码，从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。

    Accelerated simulation and verification of a system under test (SUT) using cache and replacement management tables
    5.
    发明授权
    Accelerated simulation and verification of a system under test (SUT) using cache and replacement management tables 有权
    使用缓存和替换管理表加速对被测系统（SUT）的仿真和验证

    公开(公告)号：US07756695B2

    公开(公告)日：2010-07-13

    申请号：US11464122

    申请日：2006-08-11

    申请人： Clark M. O'Niell ,  Joseph A. Perrie, III ,  Steven L. Roberts ,  Christopher J. Spandikow

    发明人： Clark M. O'Niell ,  Joseph A. Perrie, III ,  Steven L. Roberts ,  Christopher J. Spandikow

    IPC分类号： G06F17/50 ,  G06F9/455

    CPC分类号： G06F17/5027

    摘要： A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.

    摘要翻译： 提供了一种缓存替换系统，用于通过启用增强的缓存数据和状态检查来扩展加速仿真的调试功能。 该系统包括在加速模拟环境中实施替换管理表的Cell Broadband Engine Architecture（CBEA）兼容系统。 RMT控制高速缓存替换，并允许软件在缓存的特定子集处指定具有特定地址范围的条目。 RMT还允许在高速缓存中锁定数据，并且用于通过指导已知在特定集合中仅使用一次的数据来防止重写高速缓存中的数据。 在加速模拟环境中使用锁定机制，用户能够运行代码集，当正确设计被测试的微处理器系统时，可以在每个不同的高速缓存集中的每一个中生成相同和可验证的数据和高速缓存状态。

    System and Method for Masking a Boot Sequence by Providing a Dummy Processor
    6.
    发明申请
    System and Method for Masking a Boot Sequence by Providing a Dummy Processor 失效
    通过提供一个虚拟处理器来屏蔽引导序列的系统和方法

    公开(公告)号：US20080215874A1

    公开(公告)日：2008-09-04

    申请号：US12120847

    申请日：2008-05-15

    申请人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    发明人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    IPC分类号： G06F15/177

    CPC分类号： G06F9/4406 ,  G06F21/575 ,  G06F21/75 ,  G06F21/755 ,  H04L9/08 ,  H04L2209/04 ,  H04L2209/08

    摘要： A system and method for masking a boot sequence by providing a dummy processor are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

    摘要翻译： 提供了一种通过提供虚拟处理器来掩蔽引导序列的系统和方法。 使用系统和方法，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 非启动处理器上的屏蔽码的执行优选地产生近似发动机处理器上的实际启动代码执行的签名的电磁和/或热签名。 选择非引导处理器之一来执行不同于其它掩码代码序列的掩码，从而从外部监视的角度生成似乎是唯一的电磁和/或热签名。

    SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT CODE ON EACH PROCESSOR
    7.
    发明申请
    SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT CODE ON EACH PROCESSOR 审中-公开
    通过在每个处理器上运行不同代码来屏蔽引导序列的系统和方法

    公开(公告)号：US20070288739A1

    公开(公告)日：2007-12-13

    申请号：US11423330

    申请日：2006-06-09

    申请人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    发明人： Jason N. Dale ,  Jonathan J. DeMent ,  Clark M. O'Niell ,  Steven L. Roberts

    IPC分类号： G06F15/177

    CPC分类号： G06F9/4401 ,  G06F9/4405 ,  G06F21/556 ,  G06F21/575 ,  G06F2221/2123

    摘要： A system and method for masking a boot sequence by running different code on each processor of a multiprocessor system are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The masking code executed by each of the non-boot processors may be different from each other and may be randomly selected from a plurality of masking code sequences stored in a masking code storage device. Each execution of masking code on each of the non-boot processors may generate a different electromagnetic and/or thermal signature such that none of the processors appear to be unique from an external monitoring perspective.

    摘要翻译： 提供了一种通过在多处理器系统的每个处理器上运行不同代码来屏蔽引导序列的系统和方法。 使用系统和方法，多处理器系统的处理器之一被选择为引导处理器。 多处理器系统的其他处理器执行掩蔽代码，其产生屏蔽实际引导处理器的电磁和/或热特征的电磁和/或热特征。 由每个非引导处理器执行的掩蔽码可以彼此不同，并且可以从存储在掩码代码存储设备中的多个掩码代码序列中随机选择。 每个非引导处理器上的每个执行屏蔽代码可以产生不同的电磁和/或热签名，使得所有处理器都不会从外部监视角度看起来是唯一的。

    SYSTEM AND METHOD FOR BROADCASTING INSTRUCTIONS/DATA TO A PLURALITY OF PROCESSORS IN A MULTIPROCESSOR DEVICE VIA ALIASING
    8.
    发明申请
    SYSTEM AND METHOD FOR BROADCASTING INSTRUCTIONS/DATA TO A PLURALITY OF PROCESSORS IN A MULTIPROCESSOR DEVICE VIA ALIASING 失效
    用于通过处理在多处理器装置中将指令/数据广播到多个处理器的系统和方法

    公开(公告)号：US20070283037A1

    公开(公告)日：2007-12-06

    申请号：US11421512

    申请日：2006-06-01

    申请人： Adam P. Burns ,  Steven L. Roberts ,  Christopher J. Spandikow ,  Todd E. Swanson

    发明人： Adam P. Burns ,  Steven L. Roberts ,  Christopher J. Spandikow ,  Todd E. Swanson

    IPC分类号： G06F15/173

    CPC分类号： G06F9/3802 ,  G06F9/3824 ,  G06F9/3891 ,  G06F12/0284 ,  G06F12/0692 ,  G06F15/167

    摘要： A system and method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing are provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

    摘要翻译： 提供了一种通过混叠向多处理器设备中的多个处理器广播指令/数据的系统和方法。 为了向多个处理器广播数据，控制处理器向存储处理器的标识符的寄存器进行写入，并将这些寄存器中的两个或更多个设置为相同的值。 控制处理器可以将要广播的所需数据/指令写入对应于与两个或多个处理器的处理器标识符相关联的起始地址的存储器的一部分。 当两个或多个处理器寻找要从其读取的本地存储器的起始地址时，两个或更多个处理器将标识相同的起始地址，基本上将存储器区域混叠。 两个或多个处理器将从识别的起始地址开始读取来自相同别名存储器区域的指令/数据，并处理相同的指令/数据。