公开(公告)号：US06514841B2

公开(公告)日：2003-02-04

申请号：US09891503

申请日：2001-06-27

申请人： Yong-Soo Kim ,  Su-Jin Oh

发明人： Yong-Soo Kim ,  Su-Jin Oh

IPC分类号： H01L213205

CPC分类号： H01L21/28247 ,  H01L21/28061 ,  H01L21/3211 ,  H01L27/10891

摘要： A method for manufacturing a gate structure for use in a semiconductor device including the steps of sequentially forming a gate oxide layer, a polysilicon layer, a tungsten layer and a nitride layer on top of a semiconductor substrate, patterning the nitride layer, the tungsten layer, the polysilicon layer and the gate oxide layer into a predetermined configuration, and carrying out a rapid thermal annealing (RTA) in an NH3 ambient, thereby forming a diffusion barrier layer between a patterned tungsten layer and a patterned polysilicon layer.

公开(公告)号：US07341940B2

公开(公告)日：2008-03-11

申请号：US11024476

申请日：2004-12-30

申请人： Su Jin Oh

发明人： Su Jin Oh

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76862 ,  H01L21/76873

摘要： A method of forming metal wirings for a semiconductor device. A first etch stop layer, an dielectric layer, a second etch stop layer, and a wiring layer are deposited on a semiconductor substrate. A hole is formed by etching the wiring layer, the first etch stop layer, and the dielectric layer. A trench is formed by etching the wiring layer. The exposed first and second etch stop layers are removed after removal of the trench pattern. A barrier metal layer is deposited on inner walls of the hole and the trench. Grooves are formed on the barrier metal layer. A metal seed layer is deposited on the barrier metal layer. A metal thin layer is deposited inside the hole and the trench. The metal thin layer, the metal seed layer, and the barrier metal layer on the wiring layer are removed.

摘要翻译： 一种形成半导体器件的金属布线的方法。 第一蚀刻停止层，电介质层，第二蚀刻停止层和布线层沉积在半导体衬底上。 通过蚀刻布线层，第一蚀刻停止层和电介质层形成孔。 通过蚀刻布线层形成沟槽。 在去除沟槽图案之后，去除暴露的第一和第二蚀刻停止层。 阻挡金属层沉积在孔和沟槽的内壁上。 沟槽形成在阻挡金属层上。 金属种子层沉积在阻挡金属层上。 金属薄层沉积在孔和沟槽内。 金属薄层，金属种子层和布线层上的阻挡金属层被去除。

公开(公告)号：US06316349B1

公开(公告)日：2001-11-13

申请号：US09438048

申请日：1999-11-10

申请人： Jeong Ho Kim ,  Jae Ok Ryu ,  Ja Chun Ku ,  Jin Woong Kim ,  Si Bum Kim ,  Su Jin Oh

发明人： Jeong Ho Kim ,  Jae Ok Ryu ,  Ja Chun Ku ,  Jin Woong Kim ,  Si Bum Kim ,  Su Jin Oh

IPC分类号： H01L214763

CPC分类号： H01L21/76897 ,  H01L21/31116 ,  H01L21/3144 ,  H01L21/76801 ,  H01L21/76834 ,  H01L29/6656 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a method for forming contacts of a semiconductor device. In accordance with the invention, an oxidized silicon-rich nitride film is used as an etch barrier film for a self-aligned contact (SAC) process. Accordingly, the oxidized silicon-rich nitride film exhibits less stress, as compared to an LPCVD nitride film, thereby being capable of avoiding a degradation in the characteristics of the devices finally produced or distortion of the wafer used. There is no formation of cracks occurring in the nitride film during a subsequent thermal process. It is also unnecessary to conduct an additional reflection preventing process. Accordingly, the entire process is simplified. It is also possible to improve a decrease in the operating speed of the devices due to a parasitic capacitance existing among conductive lines because the oxidized silicon-rich nitride film has a low dielectric constant, as compared to nitride films. No damage occurs in the oxidized silicon-rich nitride film, so that it is possible to prevent the substrate from being damaged.

摘要翻译： 公开了一种形成半导体器件的接触的方法。 根据本发明，氧化富硅氮化物膜用作自对准接触（SAC）工艺的蚀刻阻挡膜。 因此，与LPCVD氮化物膜相比，氧化富硅氮化物膜的应力显示较小，从而能够避免最终产生的器件的特性劣化或所使用的晶片的变形。 在随后的热处理中，在氮化物膜中不会形成裂缝。 也不需要进行附加的防反射处理。 因此，整个过程被简化。 与氮化膜相比，由于氧化富硅的氮化物膜具有低的介电常数，所以可以改善由于导电线中存在的寄生电容而引起的器件的工作速度的降低。 在氧化富硅的氮化物膜中不会发生损伤，从而可以防止衬底损坏。